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| author | Florian Fainelli <florian@openwrt.org> | 2009-08-04 23:09:36 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2009-11-02 12:00:03 +0100 |
| commit | 72838a170372d6bb44bcb04a81aa2c83312cfbc0 (patch) | |
| tree | 36f416b9a26fab0a07a2d08958f2a398a9e1472b /arch/mips | |
| parent | 2cfac7f7f2e6d11bcba105b3d6ba4d96ba5ad349 (diff) | |
| download | kernel_samsung_smdk4412-72838a170372d6bb44bcb04a81aa2c83312cfbc0.zip kernel_samsung_smdk4412-72838a170372d6bb44bcb04a81aa2c83312cfbc0.tar.gz kernel_samsung_smdk4412-72838a170372d6bb44bcb04a81aa2c83312cfbc0.tar.bz2 | |
MIPS: AR7: register watchdog device only if enabled in hw configuration
This patch checks if the watchdog enable bit is set in the DCL register
meaning that the hardware watchdog actually works and if so, register the
ar7_wdt platform_device.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/ar7/platform.c | 9 | ||||
| -rw-r--r-- | arch/mips/include/asm/mach-ar7/ar7.h | 3 |
2 files changed, 11 insertions, 1 deletions
diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c index e2278c0..835f3f0 100644 --- a/arch/mips/ar7/platform.c +++ b/arch/mips/ar7/platform.c @@ -503,6 +503,7 @@ static int __init ar7_register_devices(void) { u16 chip_id; int res; + u32 *bootcr, val; #ifdef CONFIG_SERIAL_8250 static struct uart_port uart_port[2]; @@ -595,7 +596,13 @@ static int __init ar7_register_devices(void) ar7_wdt_res.end = ar7_wdt_res.start + 0x20; - res = platform_device_register(&ar7_wdt); + bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4); + val = *bootcr; + iounmap(bootcr); + + /* Register watchdog only if enabled in hardware */ + if (val & AR7_WDT_HW_ENA) + res = platform_device_register(&ar7_wdt); return res; } diff --git a/arch/mips/include/asm/mach-ar7/ar7.h b/arch/mips/include/asm/mach-ar7/ar7.h index de71694..21cbbc7 100644 --- a/arch/mips/include/asm/mach-ar7/ar7.h +++ b/arch/mips/include/asm/mach-ar7/ar7.h @@ -78,6 +78,9 @@ #define AR7_REF_CLOCK 25000000 #define AR7_XTAL_CLOCK 24000000 +/* DCL */ +#define AR7_WDT_HW_ENA 0x10 + struct plat_cpmac_data { int reset_bit; int power_bit; |