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| author | Peter Zijlstra <a.p.zijlstra@chello.nl> | 2010-03-05 13:49:35 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2010-03-10 13:23:35 +0100 |
| commit | 74846d35b24b6efd61bb88a0a750b6bb257e6e78 (patch) | |
| tree | 82b2a428ce246a1ceaf390077d38a618fd6e01cb /arch/x86/kernel/cpu/perf_event_intel_lbr.c | |
| parent | 3c44780b220e876b01e39d4028cd6f4205fbf5d6 (diff) | |
| download | kernel_samsung_smdk4412-74846d35b24b6efd61bb88a0a750b6bb257e6e78.zip kernel_samsung_smdk4412-74846d35b24b6efd61bb88a0a750b6bb257e6e78.tar.gz kernel_samsung_smdk4412-74846d35b24b6efd61bb88a0a750b6bb257e6e78.tar.bz2 | |
perf, x86: Clear the LBRs on init
Some CPUs have errata where the LBR is not cleared on Power-On. So always
clear the LBRs before use.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Arnaldo Carvalho de Melo <acme@infradead.org>
Cc: paulus@samba.org
Cc: eranian@google.com
Cc: robert.richter@amd.com
Cc: fweisbec@gmail.com
LKML-Reference: <20100305154128.966563424@chello.nl>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/cpu/perf_event_intel_lbr.c')
| -rw-r--r-- | arch/x86/kernel/cpu/perf_event_intel_lbr.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c b/arch/x86/kernel/cpu/perf_event_intel_lbr.c index 4f3a124..dcec765 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c +++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c @@ -53,6 +53,9 @@ static void intel_pmu_lbr_reset_64(void) static void intel_pmu_lbr_reset(void) { + if (!x86_pmu.lbr_nr) + return; + if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_32) intel_pmu_lbr_reset_32(); else |