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authorJoerg Roedel <joerg.roedel@amd.com>2008-10-30 17:43:57 +0100
committerJoerg Roedel <joerg.roedel@amd.com>2008-10-30 17:50:14 +0100
commitae9b9403644f3ecc76867af042e7e1cfd5c099d0 (patch)
treef4c48930ef4da0cfa6e7fd4f83f2499b820b8511 /arch
parent1e19b16a30c34c042f1eaa23db4c99bfad1dac0e (diff)
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AMD IOMMU: fix detection of NP capable IOMMUs
This patch changes the code to use IOMMU_CAP_NPCACHE as a shift and not as a mask. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/amd_iommu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index 3b346c6..38e88d4 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -50,7 +50,7 @@ static int dma_ops_unity_map(struct dma_ops_domain *dma_dom,
/* returns !0 if the IOMMU is caching non-present entries in its TLB */
static int iommu_has_npcache(struct amd_iommu *iommu)
{
- return iommu->cap & IOMMU_CAP_NPCACHE;
+ return iommu->cap & (1UL << IOMMU_CAP_NPCACHE);
}
/****************************************************************************