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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-01-11 15:10:08 +1100
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-01-11 15:10:08 +1100
commiteed0ba0b4ab2d1668588219a8efa81bf8636a12d (patch)
treef5aa3c732e7830a1b24e6071f8bed0f799881187 /drivers/dma/fsldma.h
parent98b14d6b290d96b24ae993ceaccc59b2aa4b130c (diff)
parentc9de9333f5a860cab82052bce6ac28bcac9b2c26 (diff)
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Merge remote branch 'gcl/next' into next
Diffstat (limited to 'drivers/dma/fsldma.h')
-rw-r--r--drivers/dma/fsldma.h9
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h
index cb4d6ff..ba9f403 100644
--- a/drivers/dma/fsldma.h
+++ b/drivers/dma/fsldma.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ * Copyright (C) 2007-2010 Freescale Semiconductor, Inc. All rights reserved.
*
* Author:
* Zhang Wei <wei.zhang@freescale.com>, Jul 2007
@@ -36,6 +36,13 @@
#define FSL_DMA_MR_DAHE 0x00002000
#define FSL_DMA_MR_SAHE 0x00001000
+/*
+ * Bandwidth/pause control determines how many bytes a given
+ * channel is allowed to transfer before the DMA engine pauses
+ * the current channel and switches to the next channel
+ */
+#define FSL_DMA_MR_BWC 0x08000000
+
/* Special MR definition for MPC8349 */
#define FSL_DMA_MR_EOTIE 0x00000080
#define FSL_DMA_MR_PRC_RM 0x00000800