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| author | Anton Vorontsov <avorontsov@ru.mvista.com> | 2009-09-22 16:45:11 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-09-23 07:39:36 -0700 |
| commit | c08592698534f390afe726c38301aa8f1620c361 (patch) | |
| tree | 3b8a3691bbfe54c15887a595774589a9ab1d2334 /drivers/mmc | |
| parent | 1e5df7525d0705dfbfded0c10a7b87b0a754a35d (diff) | |
| download | kernel_samsung_smdk4412-c08592698534f390afe726c38301aa8f1620c361.zip kernel_samsung_smdk4412-c08592698534f390afe726c38301aa8f1620c361.tar.gz kernel_samsung_smdk4412-c08592698534f390afe726c38301aa8f1620c361.tar.bz2 | |
sdhci-of: avoid writing reserved bits into host control register
SDHCI core tries to write HISPD bit into the host control register, but
the eSDHC controllers don't have that bit, and that causes all sorts of
misbehaviour when using 4-bit mode capable SD cards.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Cc: Pierre Ossman <pierre@ossman.eu>
Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: David Vrabel <david.vrabel@csr.com>
Cc: Ben Dooks <ben@fluff.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/mmc')
| -rw-r--r-- | drivers/mmc/host/sdhci-of.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-of.c b/drivers/mmc/host/sdhci-of.c index 2b07569..3439fc1 100644 --- a/drivers/mmc/host/sdhci-of.c +++ b/drivers/mmc/host/sdhci-of.c @@ -48,6 +48,8 @@ struct sdhci_of_host { #define ESDHC_CLOCK_HCKEN 0x00000002 #define ESDHC_CLOCK_IPGEN 0x00000001 +#define ESDHC_HOST_CONTROL_RES 0x05 + static u32 esdhc_readl(struct sdhci_host *host, int reg) { return in_be32(host->ioaddr + reg); @@ -109,6 +111,10 @@ static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg) int base = reg & ~0x3; int shift = (reg & 0x3) * 8; + /* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */ + if (reg == SDHCI_HOST_CONTROL) + val &= ~ESDHC_HOST_CONTROL_RES; + clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift); } |