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| author | Matt Reimer <mreimer@vpop.net> | 2008-11-18 10:54:32 -0800 |
|---|---|---|
| committer | David Woodhouse <David.Woodhouse@intel.com> | 2009-01-05 13:03:20 +0100 |
| commit | 5b0d4d7c8a67c5ba3d35e6ceb0c5530cc6846db7 (patch) | |
| tree | 0b810dda67150d67279dc854cf98b10ec2c0fc85 /drivers/mtd | |
| parent | 7f9938d0fd6c778bd0ce296a3e3b50266de2b892 (diff) | |
| download | kernel_samsung_smdk4412-5b0d4d7c8a67c5ba3d35e6ceb0c5530cc6846db7.zip kernel_samsung_smdk4412-5b0d4d7c8a67c5ba3d35e6ceb0c5530cc6846db7.tar.gz kernel_samsung_smdk4412-5b0d4d7c8a67c5ba3d35e6ceb0c5530cc6846db7.tar.bz2 | |
[MTD] [NAND] pxa3xx: convert from ns to clock ticks more accurately
The various fields in NDTR{01} are in units of clock ticks minus one, but the
ns2cycle macro mistakenly adds one, inflating the number of clock ticks and
making it impossible to set any of these fields to zero.
Signed-off-by: Matt Reimer <mreimer@vpop.net>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd')
| -rw-r--r-- | drivers/mtd/nand/pxa3xx_nand.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index 7582581..cc55cbc 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -298,7 +298,7 @@ static struct pxa3xx_nand_flash *builtin_flash_types[] = { #define NDTR1_tAR(c) (min((c), 15) << 0) /* convert nano-seconds to nand flash controller clock cycles */ -#define ns2cycle(ns, clk) (int)(((ns) * (clk / 1000000) / 1000) + 1) +#define ns2cycle(ns, clk) (int)(((ns) * (clk / 1000000) / 1000) - 1) static void pxa3xx_nand_set_timing(struct pxa3xx_nand_info *info, const struct pxa3xx_nand_timing *t) |