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authorSebastian Siewior <bigeasy@linutronix.de>2008-05-09 16:10:37 +0200
committerGreg Ungerer <gerg@uclinux.org>2008-07-23 15:11:28 +1000
commita6260ef84103fa8a51a67b6a58e5e16c676e08ad (patch)
treea20685c546b2e2ffc49273f3ab4181577b3a78e0 /include/asm-m68knommu
parent5bed10a5ee272fbf18ce0ce764245bbb8f28e2e6 (diff)
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m68knommu: add ffs and __ffs plattform which support ISA A+ or ISA C
the ff1 and bitrev opcode appears in ISA C and ISA A+ what isn't supported by all plattforms. The assembly optimization is automaticly enabled if the compiler understand the required cpu keyword. My m5235 seems to boot and run fine so far. Signed-off-by: Sebastian Siewior <bigeasy@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'include/asm-m68knommu')
-rw-r--r--include/asm-m68knommu/bitops.h30
1 files changed, 30 insertions, 0 deletions
diff --git a/include/asm-m68knommu/bitops.h b/include/asm-m68knommu/bitops.h
index c142fbf..6f3685e 100644
--- a/include/asm-m68knommu/bitops.h
+++ b/include/asm-m68knommu/bitops.h
@@ -14,8 +14,38 @@
#error only <linux/bitops.h> can be included directly
#endif
+#if defined (__mcfisaaplus__) || defined (__mcfisac__)
+static inline int ffs(unsigned int val)
+{
+ if (!val)
+ return 0;
+
+ asm volatile(
+ "bitrev %0\n\t"
+ "ff1 %0\n\t"
+ : "=d" (val)
+ : "0" (val)
+ );
+ val++;
+ return val;
+}
+
+static inline int __ffs(unsigned int val)
+{
+ asm volatile(
+ "bitrev %0\n\t"
+ "ff1 %0\n\t"
+ : "=d" (val)
+ : "0" (val)
+ );
+ return val;
+}
+
+#else
#include <asm-generic/bitops/ffs.h>
#include <asm-generic/bitops/__ffs.h>
+#endif
+
#include <asm-generic/bitops/sched.h>
#include <asm-generic/bitops/ffz.h>