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authorGreg Ungerer <gerg@snapgear.com>2006-06-26 10:33:10 +1000
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-25 17:43:33 -0700
commitb671b653da35cd38897c7b19e9baed64e7a9e1a1 (patch)
tree1be02e974a212499302d02514af5e82ea122377d /include/asm-m68knommu
parent2082b477dc7e9d5b3f773a36aae2dbc55b4263c2 (diff)
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[PATCH] m68knommu: read/write register access for PIT timer
Modify the m68knommu/ColdFire PIT timer code to use register offsets with raw_read/raw_write access, instead of a mapped struct. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-m68knommu')
-rw-r--r--include/asm-m68knommu/mcfpit.h8
1 files changed, 3 insertions, 5 deletions
diff --git a/include/asm-m68knommu/mcfpit.h b/include/asm-m68knommu/mcfpit.h
index 0d2672d..f570cf6 100644
--- a/include/asm-m68knommu/mcfpit.h
+++ b/include/asm-m68knommu/mcfpit.h
@@ -28,11 +28,9 @@
/*
* Define the PIT timer register set addresses.
*/
-struct mcfpit {
- unsigned short pcsr; /* PIT control and status */
- unsigned short pmr; /* PIT modulus register */
- unsigned short pcntr; /* PIT count register */
-} __attribute__((packed));
+#define MCFPIT_PCSR 0x0 /* PIT control register */
+#define MCFPIT_PMR 0x2 /* PIT modulus register */
+#define MCFPIT_PCNTR 0x4 /* PIT count register */
/*
* Bit definitions for the PIT Control and Status register.