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-rw-r--r--arch/mips/Kconfig19
-rw-r--r--arch/mips/cobalt/pci.c4
-rw-r--r--arch/mips/gt64120/wrppmc/pci.c4
-rw-r--r--arch/mips/mips-boards/generic/pci.c4
-rw-r--r--arch/mips/pci/Makefile3
-rw-r--r--arch/mips/pci/ops-gt64111.c100
-rw-r--r--arch/mips/pci/ops-gt64xxx_pci0.c (renamed from arch/mips/pci/ops-gt64120.c)30
-rw-r--r--arch/mips/pci/pci-lasat.c4
-rw-r--r--arch/mips/pci/pci-ocelot.c2
9 files changed, 33 insertions, 137 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index c78b143..2fd82e5 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -165,7 +165,7 @@ config MIPS_COBALT
select HW_HAS_PCI
select I8259
select IRQ_CPU
- select MIPS_GT64111
+ select PCI_GT64XXX_PCI0
select SYS_HAS_CPU_NEVADA
select SYS_HAS_EARLY_PRINTK
select SYS_SUPPORTS_32BIT_KERNEL
@@ -207,7 +207,7 @@ config MIPS_EV64120
depends on EXPERIMENTAL
select DMA_NONCOHERENT
select HW_HAS_PCI
- select MIPS_GT64120
+ select PCI_GT64XXX_PCI0
select SYS_HAS_CPU_R5000
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
@@ -245,7 +245,7 @@ config LASAT
select DMA_NONCOHERENT
select SYS_HAS_EARLY_PRINTK
select HW_HAS_PCI
- select MIPS_GT64120
+ select PCI_GT64XXX_PCI0
select MIPS_NILE4
select R5000_CPU_SCACHE
select SYS_HAS_CPU_R5000
@@ -263,7 +263,7 @@ config MIPS_ATLAS
select HW_HAS_PCI
select MIPS_BOARDS_GEN
select MIPS_BONITO64
- select MIPS_GT64120
+ select PCI_GT64XXX_PCI0
select MIPS_MSC
select RM7000_CPU_SCACHE
select SWAP_IO_SPACE
@@ -296,7 +296,7 @@ config MIPS_MALTA
select MIPS_BOARDS_GEN
select MIPS_BONITO64
select MIPS_CPU_SCACHE
- select MIPS_GT64120
+ select PCI_GT64XXX_PCI0
select MIPS_MSC
select SWAP_IO_SPACE
select SYS_HAS_CPU_MIPS32_R1
@@ -340,7 +340,7 @@ config WR_PPMC
select BOOT_ELF32
select DMA_NONCOHERENT
select HW_HAS_PCI
- select MIPS_GT64120
+ select PCI_GT64XXX_PCI0
select SWAP_IO_SPACE
select SYS_HAS_CPU_MIPS32_R1
select SYS_HAS_CPU_MIPS32_R2
@@ -398,7 +398,7 @@ config MOMENCO_OCELOT
select HW_HAS_PCI
select IRQ_CPU
select IRQ_CPU_RM7K
- select MIPS_GT64120
+ select PCI_GT64XXX_PCI0
select RM7000_CPU_SCACHE
select SWAP_IO_SPACE
select SYS_HAS_CPU_RM7000
@@ -999,10 +999,7 @@ config DDB5XXX_COMMON
config MIPS_BOARDS_GEN
bool
-config MIPS_GT64111
- bool
-
-config MIPS_GT64120
+config PCI_GT64XXX_PCI0
bool
config MIPS_TX3927
diff --git a/arch/mips/cobalt/pci.c b/arch/mips/cobalt/pci.c
index d016006..d91027f 100644
--- a/arch/mips/cobalt/pci.c
+++ b/arch/mips/cobalt/pci.c
@@ -14,7 +14,7 @@
#include <asm/gt64120.h>
-extern struct pci_ops gt64111_pci_ops;
+extern struct pci_ops gt64xxx_pci0_ops;
static struct resource cobalt_mem_resource = {
.start = GT_DEF_PCI0_MEM0_BASE,
@@ -31,7 +31,7 @@ static struct resource cobalt_io_resource = {
};
static struct pci_controller cobalt_pci_controller = {
- .pci_ops = &gt64111_pci_ops,
+ .pci_ops = &gt64xxx_pci0_ops,
.mem_resource = &cobalt_mem_resource,
.io_resource = &cobalt_io_resource,
.io_offset = 0 - GT_DEF_PCI0_IO_BASE,
diff --git a/arch/mips/gt64120/wrppmc/pci.c b/arch/mips/gt64120/wrppmc/pci.c
index 2fbe934..0d5289b 100644
--- a/arch/mips/gt64120/wrppmc/pci.c
+++ b/arch/mips/gt64120/wrppmc/pci.c
@@ -13,7 +13,7 @@
#include <linux/kernel.h>
#include <asm/gt64120.h>
-extern struct pci_ops gt64120_pci_ops;
+extern struct pci_ops gt64xxx_pci0_ops;
static struct resource pci0_io_resource = {
.name = "pci_0 io",
@@ -30,7 +30,7 @@ static struct resource pci0_mem_resource = {
};
static struct pci_controller hose_0 = {
- .pci_ops = &gt64120_pci_ops,
+ .pci_ops = &gt64xxx_pci0_ops,
.io_resource = &pci0_io_resource,
.mem_resource = &pci0_mem_resource,
};
diff --git a/arch/mips/mips-boards/generic/pci.c b/arch/mips/mips-boards/generic/pci.c
index 3192a14..f98d60f 100644
--- a/arch/mips/mips-boards/generic/pci.c
+++ b/arch/mips/mips-boards/generic/pci.c
@@ -65,7 +65,7 @@ static struct resource msc_io_resource = {
};
extern struct pci_ops bonito64_pci_ops;
-extern struct pci_ops gt64120_pci_ops;
+extern struct pci_ops gt64xxx_pci0_ops;
extern struct pci_ops msc_pci_ops;
static struct pci_controller bonito64_controller = {
@@ -76,7 +76,7 @@ static struct pci_controller bonito64_controller = {
};
static struct pci_controller gt64120_controller = {
- .pci_ops = &gt64120_pci_ops,
+ .pci_ops = &gt64xxx_pci0_ops,
.io_resource = &gt64120_io_resource,
.mem_resource = &gt64120_mem_resource,
};
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index bf85995..df487c0 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -8,8 +8,7 @@ obj-y += pci.o pci-dac.o
# PCI bus host bridge specific code
#
obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o
-obj-$(CONFIG_MIPS_GT64111) += ops-gt64111.o
-obj-$(CONFIG_MIPS_GT64120) += ops-gt64120.o
+obj-$(CONFIG_PCI_GT64XXX_PCI0) += ops-gt64xxx_pci0.o
obj-$(CONFIG_PCI_MARVELL) += ops-marvell.o
obj-$(CONFIG_MIPS_MSC) += ops-msc.o
obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o
diff --git a/arch/mips/pci/ops-gt64111.c b/arch/mips/pci/ops-gt64111.c
deleted file mode 100644
index ecd3991..0000000
--- a/arch/mips/pci/ops-gt64111.c
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 1996, 1997, 2002 by Ralf Baechle
- * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/pci.h>
-#include <asm/io.h>
-#include <asm/gt64120.h>
-
-#include <asm/mach-cobalt/cobalt.h>
-
-/*
- * Device 31 on the GT64111 is used to generate PCI special
- * cycles, so we shouldn't expected to find a device there ...
- */
-static inline int pci_range_ck(struct pci_bus *bus, unsigned int devfn)
-{
- if (bus->number == 0 && PCI_SLOT(devfn) < 31)
- return 0;
-
- return -1;
-}
-
-static int gt64111_pci_read_config(struct pci_bus *bus, unsigned int devfn,
- int where, int size, u32 * val)
-{
- if (pci_range_ck(bus, devfn))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- switch (size) {
- case 4:
- PCI_CFG_SET(devfn, where);
- *val = GT_READ(GT_PCI0_CFGDATA_OFS);
- return PCIBIOS_SUCCESSFUL;
-
- case 2:
- PCI_CFG_SET(devfn, (where & ~0x3));
- *val = GT_READ(GT_PCI0_CFGDATA_OFS)
- >> ((where & 3) * 8);
- return PCIBIOS_SUCCESSFUL;
-
- case 1:
- PCI_CFG_SET(devfn, (where & ~0x3));
- *val = GT_READ(GT_PCI0_CFGDATA_OFS)
- >> ((where & 3) * 8);
- return PCIBIOS_SUCCESSFUL;
- }
-
- return PCIBIOS_BAD_REGISTER_NUMBER;
-}
-
-static int gt64111_pci_write_config(struct pci_bus *bus, unsigned int devfn,
- int where, int size, u32 val)
-{
- u32 tmp;
-
- if (pci_range_ck(bus, devfn))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- switch (size) {
- case 4:
- PCI_CFG_SET(devfn, where);
- GT_WRITE(GT_PCI0_CFGDATA_OFS, val);
-
- return PCIBIOS_SUCCESSFUL;
-
- case 2:
- PCI_CFG_SET(devfn, (where & ~0x3));
- tmp = GT_READ(GT_PCI0_CFGDATA_OFS);
- tmp &= ~(0xffff << ((where & 0x3) * 8));
- tmp |= (val << ((where & 0x3) * 8));
- GT_WRITE(GT_PCI0_CFGDATA_OFS, tmp);
-
- return PCIBIOS_SUCCESSFUL;
-
- case 1:
- PCI_CFG_SET(devfn, (where & ~0x3));
- tmp = GT_READ(GT_PCI0_CFGDATA_OFS);
- tmp &= ~(0xff << ((where & 0x3) * 8));
- tmp |= (val << ((where & 0x3) * 8));
- GT_WRITE(GT_PCI0_CFGDATA_OFS, tmp);
-
- return PCIBIOS_SUCCESSFUL;
- }
-
- return PCIBIOS_BAD_REGISTER_NUMBER;
-}
-
-struct pci_ops gt64111_pci_ops = {
- .read = gt64111_pci_read_config,
- .write = gt64111_pci_write_config,
-};
diff --git a/arch/mips/pci/ops-gt64120.c b/arch/mips/pci/ops-gt64xxx_pci0.c
index 6335844..3d896c5 100644
--- a/arch/mips/pci/ops-gt64120.c
+++ b/arch/mips/pci/ops-gt64xxx_pci0.c
@@ -39,8 +39,8 @@
#define PCI_CFG_TYPE1_DEV_SHF 11
#define PCI_CFG_TYPE1_BUS_SHF 16
-static int gt64120_pcibios_config_access(unsigned char access_type,
- struct pci_bus *bus, unsigned int devfn, int where, u32 * data)
+static int gt64xxx_pci0_pcibios_config_access(unsigned char access_type,
+ struct pci_bus *bus, unsigned int devfn, int where, u32 * data)
{
unsigned char busnum = bus->number;
u32 intr;
@@ -100,13 +100,13 @@ static int gt64120_pcibios_config_access(unsigned char access_type,
* We can't address 8 and 16 bit words directly. Instead we have to
* read/write a 32bit word and mask/modify the data we actually want.
*/
-static int gt64120_pcibios_read(struct pci_bus *bus, unsigned int devfn,
- int where, int size, u32 * val)
+static int gt64xxx_pci0_pcibios_read(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 * val)
{
u32 data = 0;
- if (gt64120_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
- &data))
+ if (gt64xxx_pci0_pcibios_config_access(PCI_ACCESS_READ, bus, devfn,
+ where, &data))
return PCIBIOS_DEVICE_NOT_FOUND;
if (size == 1)
@@ -119,16 +119,16 @@ static int gt64120_pcibios_read(struct pci_bus *bus, unsigned int devfn,
return PCIBIOS_SUCCESSFUL;
}
-static int gt64120_pcibios_write(struct pci_bus *bus, unsigned int devfn,
- int where, int size, u32 val)
+static int gt64xxx_pci0_pcibios_write(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 val)
{
u32 data = 0;
if (size == 4)
data = val;
else {
- if (gt64120_pcibios_config_access(PCI_ACCESS_READ, bus, devfn,
- where, &data))
+ if (gt64xxx_pci0_pcibios_config_access(PCI_ACCESS_READ, bus,
+ devfn, where, &data))
return PCIBIOS_DEVICE_NOT_FOUND;
if (size == 1)
@@ -139,14 +139,14 @@ static int gt64120_pcibios_write(struct pci_bus *bus, unsigned int devfn,
(val << ((where & 3) << 3));
}
- if (gt64120_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where,
- &data))
+ if (gt64xxx_pci0_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn,
+ where, &data))
return PCIBIOS_DEVICE_NOT_FOUND;
return PCIBIOS_SUCCESSFUL;
}
-struct pci_ops gt64120_pci_ops = {
- .read = gt64120_pcibios_read,
- .write = gt64120_pcibios_write
+struct pci_ops gt64xxx_pci0_ops = {
+ .read = gt64xxx_pci0_pcibios_read,
+ .write = gt64xxx_pci0_pcibios_write
};
diff --git a/arch/mips/pci/pci-lasat.c b/arch/mips/pci/pci-lasat.c
index 88fb191..985784a 100644
--- a/arch/mips/pci/pci-lasat.c
+++ b/arch/mips/pci/pci-lasat.c
@@ -12,7 +12,7 @@
#include <asm/bootinfo.h>
extern struct pci_ops nile4_pci_ops;
-extern struct pci_ops gt64120_pci_ops;
+extern struct pci_ops gt64xxx_pci0_ops;
static struct resource lasat_pci_mem_resource = {
.name = "LASAT PCI MEM",
.start = 0x18000000,
@@ -38,7 +38,7 @@ static int __init lasat_pci_setup(void)
switch (mips_machtype) {
case MACH_LASAT_100:
- lasat_pci_controller.pci_ops = &gt64120_pci_ops;
+ lasat_pci_controller.pci_ops = &gt64xxx_pci0_ops;
break;
case MACH_LASAT_200:
lasat_pci_controller.pci_ops = &nile4_pci_ops;
diff --git a/arch/mips/pci/pci-ocelot.c b/arch/mips/pci/pci-ocelot.c
index 2b9495d..7f94f26 100644
--- a/arch/mips/pci/pci-ocelot.c
+++ b/arch/mips/pci/pci-ocelot.c
@@ -81,7 +81,7 @@ static struct resource ocelot_io_resource = {
};
static struct pci_controller ocelot_pci_controller = {
- .pci_ops = gt64120_pci_ops;
+ .pci_ops = gt64xxx_pci0_ops;
.mem_resource = &ocelot_mem_resource;
.io_resource = &ocelot_io_resource;
};
generated by cgit v1.1 at 2024-12-27 05:13:45 +0000