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path: root/drivers/net/wireless/bcmdhd/siutils.c
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Diffstat (limited to 'drivers/net/wireless/bcmdhd/siutils.c')
-rw-r--r--drivers/net/wireless/bcmdhd/siutils.c90
1 files changed, 67 insertions, 23 deletions
diff --git a/drivers/net/wireless/bcmdhd/siutils.c b/drivers/net/wireless/bcmdhd/siutils.c
index db108b8..0c0ffd5 100644
--- a/drivers/net/wireless/bcmdhd/siutils.c
+++ b/drivers/net/wireless/bcmdhd/siutils.c
@@ -22,7 +22,7 @@
* software in any way with any other Broadcom software provided under a license
* other than the GPL, without Broadcom's express prior written consent.
*
- * $Id: siutils.c 347632 2012-07-27 11:00:35Z $
+ * $Id: siutils.c 369572 2012-11-19 12:57:59Z $
*/
#include <bcm_cfg.h>
@@ -108,6 +108,11 @@ si_kattach(osl_t *osh)
{
static bool ksii_attached = FALSE;
+ if (!osh) {
+ SI_ERROR(("%s: osh is NULL\n", __FUNCTION__));
+ return NULL;
+ }
+
if (!ksii_attached) {
void *regs = NULL;
regs = REG_MAP(SI_ENUM_BASE, SI_CORE_SIZE);
@@ -337,7 +342,8 @@ si_doattach(si_info_t *sii, uint devid, osl_t *osh, void *regs,
chipcregs_t *cc;
char *pvars = NULL;
uint origidx;
-
+#if !defined(_CFEZ_) || defined(CFG_WL)
+#endif
ASSERT(GOODREGS(regs));
bzero((uchar*)sii, sizeof(si_info_t));
@@ -406,8 +412,12 @@ si_doattach(si_info_t *sii, uint devid, osl_t *osh, void *regs,
if (CHIPTYPE(sii->pub.socitype) == SOCI_SB) {
SI_MSG(("Found chip type SB (0x%08x)\n", w));
sb_scan(&sii->pub, regs, devid);
- } else if (CHIPTYPE(sii->pub.socitype) == SOCI_AI) {
- SI_MSG(("Found chip type AI (0x%08x)\n", w));
+ } else if ((CHIPTYPE(sii->pub.socitype) == SOCI_AI) ||
+ (CHIPTYPE(sii->pub.socitype) == SOCI_NAI)) {
+ if (CHIPTYPE(sii->pub.socitype) == SOCI_AI)
+ SI_MSG(("Found chip type AI (0x%08x)\n", w));
+ else
+ SI_MSG(("Found chip type NAI (0x%08x)\n", w));
/* pass chipc address instead of original core base */
ai_scan(&sii->pub, (void *)(uintptr)cc, devid);
} else if (CHIPTYPE(sii->pub.socitype) == SOCI_UBUS) {
@@ -430,6 +440,7 @@ si_doattach(si_info_t *sii, uint devid, osl_t *osh, void *regs,
goto exit;
}
+#if !defined(_CFEZ_) || defined(CFG_WL)
if (CHIPID(sih->chip) == BCM4322_CHIP_ID && (((sih->chipst & CST4322_SPROM_OTP_SEL_MASK)
>> CST4322_SPROM_OTP_SEL_SHIFT) == (CST4322_OTP_PRESENT |
CST4322_SPROM_PRESENT))) {
@@ -458,6 +469,7 @@ si_doattach(si_info_t *sii, uint devid, osl_t *osh, void *regs,
if (bustype == PCI_BUS) {
}
+#endif
pvars = NULL;
BCM_REFERENCE(pvars);
@@ -576,7 +588,7 @@ si_intflag(si_t *sih)
if (CHIPTYPE(sih->socitype) == SOCI_SB)
return sb_intflag(sih);
- else if (CHIPTYPE(sih->socitype) == SOCI_AI)
+ else if ((CHIPTYPE(sih->socitype) == SOCI_AI) || (CHIPTYPE(sih->socitype) == SOCI_NAI))
return R_REG(sii->osh, ((uint32 *)(uintptr)
(sii->oob_router + OOB_STATUSA)));
else {
@@ -590,7 +602,7 @@ si_flag(si_t *sih)
{
if (CHIPTYPE(sih->socitype) == SOCI_SB)
return sb_flag(sih);
- else if (CHIPTYPE(sih->socitype) == SOCI_AI)
+ else if ((CHIPTYPE(sih->socitype) == SOCI_AI) || (CHIPTYPE(sih->socitype) == SOCI_NAI))
return ai_flag(sih);
else if (CHIPTYPE(sih->socitype) == SOCI_UBUS)
return ub_flag(sih);
@@ -605,7 +617,7 @@ si_setint(si_t *sih, int siflag)
{
if (CHIPTYPE(sih->socitype) == SOCI_SB)
sb_setint(sih, siflag);
- else if (CHIPTYPE(sih->socitype) == SOCI_AI)
+ else if ((CHIPTYPE(sih->socitype) == SOCI_AI) || (CHIPTYPE(sih->socitype) == SOCI_NAI))
ai_setint(sih, siflag);
else if (CHIPTYPE(sih->socitype) == SOCI_UBUS)
ub_setint(sih, siflag);
@@ -662,7 +674,7 @@ si_corevendor(si_t *sih)
{
if (CHIPTYPE(sih->socitype) == SOCI_SB)
return sb_corevendor(sih);
- else if (CHIPTYPE(sih->socitype) == SOCI_AI)
+ else if ((CHIPTYPE(sih->socitype) == SOCI_AI) || (CHIPTYPE(sih->socitype) == SOCI_NAI))
return ai_corevendor(sih);
else if (CHIPTYPE(sih->socitype) == SOCI_UBUS)
return ub_corevendor(sih);
@@ -683,7 +695,7 @@ si_corerev(si_t *sih)
{
if (CHIPTYPE(sih->socitype) == SOCI_SB)
return sb_corerev(sih);
- else if (CHIPTYPE(sih->socitype) == SOCI_AI)
+ else if ((CHIPTYPE(sih->socitype) == SOCI_AI) || (CHIPTYPE(sih->socitype) == SOCI_NAI))
return ai_corerev(sih);
else if (CHIPTYPE(sih->socitype) == SOCI_UBUS)
return ub_corerev(sih);
@@ -755,7 +767,7 @@ si_setcore(si_t *sih, uint coreid, uint coreunit)
if (CHIPTYPE(sih->socitype) == SOCI_SB)
return sb_setcoreidx(sih, idx);
- else if (CHIPTYPE(sih->socitype) == SOCI_AI)
+ else if ((CHIPTYPE(sih->socitype) == SOCI_AI) || (CHIPTYPE(sih->socitype) == SOCI_NAI))
return ai_setcoreidx(sih, idx);
else if (CHIPTYPE(sih->socitype) == SOCI_UBUS)
return ub_setcoreidx(sih, idx);
@@ -770,7 +782,7 @@ si_setcoreidx(si_t *sih, uint coreidx)
{
if (CHIPTYPE(sih->socitype) == SOCI_SB)
return sb_setcoreidx(sih, coreidx);
- else if (CHIPTYPE(sih->socitype) == SOCI_AI)
+ else if ((CHIPTYPE(sih->socitype) == SOCI_AI) || (CHIPTYPE(sih->socitype) == SOCI_NAI))
return ai_setcoreidx(sih, coreidx);
else if (CHIPTYPE(sih->socitype) == SOCI_UBUS)
return ub_setcoreidx(sih, coreidx);
@@ -827,7 +839,7 @@ si_numaddrspaces(si_t *sih)
{
if (CHIPTYPE(sih->socitype) == SOCI_SB)
return sb_numaddrspaces(sih);
- else if (CHIPTYPE(sih->socitype) == SOCI_AI)
+ else if ((CHIPTYPE(sih->socitype) == SOCI_AI) || (CHIPTYPE(sih->socitype) == SOCI_NAI))
return ai_numaddrspaces(sih);
else if (CHIPTYPE(sih->socitype) == SOCI_UBUS)
return ub_numaddrspaces(sih);
@@ -842,7 +854,7 @@ si_addrspace(si_t *sih, uint asidx)
{
if (CHIPTYPE(sih->socitype) == SOCI_SB)
return sb_addrspace(sih, asidx);
- else if (CHIPTYPE(sih->socitype) == SOCI_AI)
+ else if ((CHIPTYPE(sih->socitype) == SOCI_AI) || (CHIPTYPE(sih->socitype) == SOCI_NAI))
return ai_addrspace(sih, asidx);
else if (CHIPTYPE(sih->socitype) == SOCI_UBUS)
return ub_addrspace(sih, asidx);
@@ -857,7 +869,7 @@ si_addrspacesize(si_t *sih, uint asidx)
{
if (CHIPTYPE(sih->socitype) == SOCI_SB)
return sb_addrspacesize(sih, asidx);
- else if (CHIPTYPE(sih->socitype) == SOCI_AI)
+ else if ((CHIPTYPE(sih->socitype) == SOCI_AI) || (CHIPTYPE(sih->socitype) == SOCI_NAI))
return ai_addrspacesize(sih, asidx);
else if (CHIPTYPE(sih->socitype) == SOCI_UBUS)
return ub_addrspacesize(sih, asidx);
@@ -871,7 +883,7 @@ void
si_coreaddrspaceX(si_t *sih, uint asidx, uint32 *addr, uint32 *size)
{
/* Only supported for SOCI_AI */
- if (CHIPTYPE(sih->socitype) == SOCI_AI)
+ if ((CHIPTYPE(sih->socitype) == SOCI_AI) || (CHIPTYPE(sih->socitype) == SOCI_NAI))
ai_coreaddrspaceX(sih, asidx, addr, size);
else
*size = 0;
@@ -882,7 +894,7 @@ si_core_cflags(si_t *sih, uint32 mask, uint32 val)
{
if (CHIPTYPE(sih->socitype) == SOCI_SB)
return sb_core_cflags(sih, mask, val);
- else if (CHIPTYPE(sih->socitype) == SOCI_AI)
+ else if ((CHIPTYPE(sih->socitype) == SOCI_AI) || (CHIPTYPE(sih->socitype) == SOCI_NAI))
return ai_core_cflags(sih, mask, val);
else if (CHIPTYPE(sih->socitype) == SOCI_UBUS)
return ub_core_cflags(sih, mask, val);
@@ -897,7 +909,7 @@ si_core_cflags_wo(si_t *sih, uint32 mask, uint32 val)
{
if (CHIPTYPE(sih->socitype) == SOCI_SB)
sb_core_cflags_wo(sih, mask, val);
- else if (CHIPTYPE(sih->socitype) == SOCI_AI)
+ else if ((CHIPTYPE(sih->socitype) == SOCI_AI) || (CHIPTYPE(sih->socitype) == SOCI_NAI))
ai_core_cflags_wo(sih, mask, val);
else if (CHIPTYPE(sih->socitype) == SOCI_UBUS)
ub_core_cflags_wo(sih, mask, val);
@@ -910,7 +922,7 @@ si_core_sflags(si_t *sih, uint32 mask, uint32 val)
{
if (CHIPTYPE(sih->socitype) == SOCI_SB)
return sb_core_sflags(sih, mask, val);
- else if (CHIPTYPE(sih->socitype) == SOCI_AI)
+ else if ((CHIPTYPE(sih->socitype) == SOCI_AI) || (CHIPTYPE(sih->socitype) == SOCI_NAI))
return ai_core_sflags(sih, mask, val);
else if (CHIPTYPE(sih->socitype) == SOCI_UBUS)
return ub_core_sflags(sih, mask, val);
@@ -925,7 +937,7 @@ si_iscoreup(si_t *sih)
{
if (CHIPTYPE(sih->socitype) == SOCI_SB)
return sb_iscoreup(sih);
- else if (CHIPTYPE(sih->socitype) == SOCI_AI)
+ else if ((CHIPTYPE(sih->socitype) == SOCI_AI) || (CHIPTYPE(sih->socitype) == SOCI_NAI))
return ai_iscoreup(sih);
else if (CHIPTYPE(sih->socitype) == SOCI_UBUS)
return ub_iscoreup(sih);
@@ -939,7 +951,7 @@ uint
si_wrapperreg(si_t *sih, uint32 offset, uint32 mask, uint32 val)
{
/* only for AI back plane chips */
- if (CHIPTYPE(sih->socitype) == SOCI_AI)
+ if ((CHIPTYPE(sih->socitype) == SOCI_AI) || (CHIPTYPE(sih->socitype) == SOCI_NAI))
return (ai_wrap_reg(sih, offset, mask, val));
return 0;
}
@@ -949,7 +961,7 @@ si_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val)
{
if (CHIPTYPE(sih->socitype) == SOCI_SB)
return sb_corereg(sih, coreidx, regoff, mask, val);
- else if (CHIPTYPE(sih->socitype) == SOCI_AI)
+ else if ((CHIPTYPE(sih->socitype) == SOCI_AI) || (CHIPTYPE(sih->socitype) == SOCI_NAI))
return ai_corereg(sih, coreidx, regoff, mask, val);
else if (CHIPTYPE(sih->socitype) == SOCI_UBUS)
return ub_corereg(sih, coreidx, regoff, mask, val);
@@ -964,7 +976,7 @@ si_core_disable(si_t *sih, uint32 bits)
{
if (CHIPTYPE(sih->socitype) == SOCI_SB)
sb_core_disable(sih, bits);
- else if (CHIPTYPE(sih->socitype) == SOCI_AI)
+ else if ((CHIPTYPE(sih->socitype) == SOCI_AI) || (CHIPTYPE(sih->socitype) == SOCI_NAI))
ai_core_disable(sih, bits);
else if (CHIPTYPE(sih->socitype) == SOCI_UBUS)
ub_core_disable(sih, bits);
@@ -975,7 +987,7 @@ si_core_reset(si_t *sih, uint32 bits, uint32 resetbits)
{
if (CHIPTYPE(sih->socitype) == SOCI_SB)
sb_core_reset(sih, bits, resetbits);
- else if (CHIPTYPE(sih->socitype) == SOCI_AI)
+ else if ((CHIPTYPE(sih->socitype) == SOCI_AI) || (CHIPTYPE(sih->socitype) == SOCI_NAI))
ai_core_reset(sih, bits, resetbits);
else if (CHIPTYPE(sih->socitype) == SOCI_UBUS)
ub_core_reset(sih, bits, resetbits);
@@ -1113,6 +1125,7 @@ si_watchdog(si_t *sih, uint ticks)
if (PMUCTL_ENAB(sih)) {
+#if !defined(_CFEZ_) || defined(CFG_WL)
if ((CHIPID(sih->chip) == BCM4319_CHIP_ID) &&
(CHIPREV(sih->chiprev) == 0) && (ticks != 0)) {
si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, clk_ctl_st), ~0, 0x2);
@@ -1120,6 +1133,7 @@ si_watchdog(si_t *sih, uint ticks)
si_core_disable(sih, 1);
si_setcore(sih, CC_CORE_ID, 0);
}
+#endif
nb = (sih->ccrev < 26) ? 16 : ((sih->ccrev >= 37) ? 32 : 24);
/* The mips compiler uses the sllv instruction,
@@ -1281,6 +1295,8 @@ si_clkctl_init(si_t *sih)
si_clkctl_setdelay(sii, (void *)(uintptr)cc);
+ OSL_DELAY(20000);
+
if (!fast)
si_setcoreidx(sih, origidx);
}
@@ -2068,6 +2084,7 @@ done:
}
+#if !defined(_CFEZ_) || defined(CFG_WL)
void
si_btcgpiowar(si_t *sih)
{
@@ -2264,6 +2281,7 @@ si_chipcontrl_epa4331_wowl(si_t *sih, bool enter_wowl)
}
si_setcoreidx(sih, origidx);
}
+#endif
uint
si_pll_reset(si_t *sih)
@@ -2298,6 +2316,12 @@ si_clk_pmu_htavail_set(si_t *sih, bool set_clear)
{
}
+/* Re-enable synth_pwrsw resource in min_res_mask for 4313 */
+void
+si_pmu_synth_pwrsw_4313_war(si_t *sih)
+{
+}
+
/* WL/BT control for 4313 btcombo boards >= P250 */
void
si_btcombo_p250_4313_war(si_t *sih)
@@ -2427,11 +2451,14 @@ si_is_sprom_available(si_t *sih)
return ((sih->chipst & CST43239_SPROM_MASK) &&
!(sih->chipst & CST43239_SFLASH_MASK));
case BCM4324_CHIP_ID:
+ case BCM43242_CHIP_ID:
return ((sih->chipst & CST4324_SPROM_MASK) &&
!(sih->chipst & CST4324_SFLASH_MASK));
case BCM4335_CHIP_ID:
return ((sih->chipst & CST4335_SPROM_MASK) &&
!(sih->chipst & CST4335_SFLASH_MASK));
+ case BCM4350_CHIP_ID:
+ return (sih->chipst & CST4350_SPROM_PRESENT) != 0;
case BCM43131_CHIP_ID:
case BCM43217_CHIP_ID:
case BCM43227_CHIP_ID:
@@ -2485,3 +2512,20 @@ int si_set_sromctl(si_t *sih, uint32 value)
return BCME_OK;
}
+
+uint
+si_core_wrapperreg(si_t *sih, uint32 coreidx, uint32 offset, uint32 mask, uint32 val)
+{
+ uint origidx;
+ uint ret_val;
+
+ origidx = si_coreidx(sih);
+
+ si_setcoreidx(sih, coreidx);
+
+ ret_val = si_wrapperreg(sih, offset, mask, val);
+
+ /* return to the original core */
+ si_setcoreidx(sih, origidx);
+ return ret_val;
+}
generated by cgit v1.1 at 2025-08-17 23:41:36 +0000