| Commit message (Collapse) | Author | Age | Files | Lines |
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If DMA is unsupported ->ide_dma_check should disable DMA.
v2:
* updated for scc_pata
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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All users of ->mmio == 1 are gone so convert ->mmio into flag.
Noticed by Alan Cox.
v2:
* updated for scc_pata
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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This results in smaller/faster/simpler code and allows future optimizations.
Also remove no longer needed ide[_mm]_{inl,outl}() and ide_hwif_t.{INL,OUTL}.
v2:
* updated for scc_pata
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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* add ide_use_fast_pio() helper for use by host drivers
* add DMA capability and hwif->autodma checks to ide_use_dma()
- au1xxx-ide/it8213/it821x drivers didn't check for (id->capability & 1)
[ for the IT8211/2 in SMART mode this check shouldn't be made but since
in it821x_fixups() we set DMA bit explicitly:
if(strstr(id->model, "Integrated Technology Express")) {
/* In raid mode the ident block is slightly buggy
We need to set the bits so that the IDE layer knows
LBA28. LBA48 and DMA ar valid */
id->capability |= 3; /* LBA28, DMA */
we are better off using generic helper if we can ]
- ide-cris driver didn't set ->autodma
[ before the patch hwif->autodma was only checked in the chipset specific
hwif->ide_dma_check implementations, for ide-cris it is cris_dma_check()
function so there no behavior change here ]
v2:
* updated patch description (thanks to Alan Cox for the feedback)
v3:
* updated for scc_pata driver
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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In cmd64x, siimage and scc_pata drivers:
* don't set drive->init_speed as it should be already
set by successful execution of ide_set_xfer_rate()
* use hwif->speedproc functions directly
Above changes allows removal of EXPORT_SYMBOL_GPL(ide_set_xfer_rate).
v2:
* updated for scc_pata driver
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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This field is no longer used by the core IDE code so fix ide-{disk,floppy}
drivers to keep openers count in the driver specific objects and remove
it from ide-{cd,scsi,tape} drivers (it was write-only).
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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* remove bogus comment for sis5513_config_xfer_rate()
* there is no need to call config_drive_art_rwp() because
it is called by config_art_rwp_pio()
* remove needless wrapper
* remove stale "TODO" comment
(IDE core should provide generic tuning code)
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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* disable DMA masks if no_piix_dma is set and remove now
not needed no_piix_dma_check from piix_config_drive_for_dma()
* there is no need to read register 0x55 in init_hwif_piix()
* move cable detection code to piix_cable_detect()
* remove unreachable 82371MX code from init_hwif_piix()
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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* remove redundant svwks_ide_dma_end() [ __ide_dma_end() is used by default ]
* remove init_dma_svwks() so the default ide_setup_dma() function is used
[ init_setup_csb6() takes care of not initializing disabled channels ]
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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* BUG() on unknown DMA mode in cs5530_config_dma()
* there is no need to call hwif->ide_dma_host_{off,on}() in
cs5530_config_dma() because hwif->ide_dma_host_{off,on}()
is called by hwif->ide_dma_off_{quietly,on}()
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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->init_dma() cannot be called with dmabase == 0
(see drivers/ide/setup-pci.c)
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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In drivers/ide/Kconfig BLK_DEV_TRM290 depends on
BLK_DEV_IDEDMA_PCI (on which is BLK_DEV_IDEDMA dependant on).
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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'speed' is always equal to 'mode' when ide_config_drive_speed() is called
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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CONFIG_PDC202XX_MASTER config option doesn't exist
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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This is the patch (based on 2.6.19-rc4) for PATA controller of
Toshiba Cell reference set(Celleb). The reference set consists
of Cell, 512MB memory, Super Companion Chip(SCC) and some
peripherals such as HDD, GbE, etc. You can see brief explanation
and picture of Cell reference set at following URLs.
http://www.toshiba.co.jp/about/press/2005_09/pr2001.htm
http://cell-industries.com/toshiba_announces.php
We use a drivers/ide driver because its design is more suitable for
SCC IDE controller than libata driver. Since SCC supports only 32bit
read/write, we must override many callbacks of ata_port_operations
by modifying generic helpers. Each time the libata common code is
updated, we must update those modified helpers. It is very hard for us.
But we will try to implement the libata driver as needed.
Signed-off-by: Kou Ishizaki <kou.ishizaki at toshiba.co.jp>
Signed-off-by: Akira Iguchi <akira2.iguchi at toshiba.co.jp>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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Fix a number of issues with the DMA support code:
- driver claims support for all SW/MW DMA modes while supporting only MWDMA2;
- ide_dma_check() method tries to enable DMA on the "known good" drives which
don't support MWDMA2;
- ide_dma_on() method upon failure to set drive to MWDMA2 re-tunes already
tuned PIO mode and calls ide_dma_off() method instead of returning error;
- ide_dma_off() method sets drive->current_speed while it doesn't actually
change (only the PIO timings are re-loaded into the chip's registers);
- init_hwif() method forcibly sets/resets both "drive DMA capable" bits while
this is properly handled by ide_dma_{on,off}() methods being called later...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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Fix the driver's tuneproc() method to always set the PIO mode requested and not
pick the best possible one, rename it to pdc202xx_tune_drive(), and change the
calls to it accordingly; remove the preceding comment which has nothing to do
with the code.
Sergei Shtylyov wrote:
> The tuneproc() method should take arg 255 for auto-selecting the best PIO
> mode, not 5 as it did here + this driver's method always auto-selected instead
> of setting the mode it's been told to -- issue typical to drivers/ide/...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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Fix two typos found by SiI680A documentation check. They caused the taskfile
transfer overclocking:
- in PIO mode 1 as 0x2283 must be used for both data and taskfile transfers;
- in PIO mode 2 as data and taskfile timings are swapped when writing to the
MMIO regs.
Fix coding style and trailing whitespace in enclosing statements while at it...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
drivers/ide/pci/siimage.c | 59 ++++++++++++++++++++++------------------------
1 file changed, 29 insertions(+), 30 deletions(-)
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patch 2/2:
Remove clearing bmdma status from cdrom_decode_status() since ATA devices
might need it as well.
(http://lkml.org/lkml/2006/12/4/201 and http://lkml.org/lkml/2006/11/15/94)
Signed-off-by: Albert Lee <albertcc@tw.ibm.com>
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: "Adam W. Hawks" <awhawks@us.ibm.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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patch 1/2 (revised):
- Fix drive->waiting_for_dma to work with CDB-intr devices.
- Do the dma status clearing in ide_intr() and add a new
hwif->ide_dma_clear_irq for Intel ICHx controllers.
Revised per Alan, Sergei and Bart's advice.
Patch against 2.6.20-rc6. Tested ok on my ICH4 and pdc20275 adapters.
Please review/apply, thanks.
Signed-off-by: Albert Lee <albertcc@tw.ibm.com>
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: "Adam W. Hawks" <awhawks@us.ibm.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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A ZIP or similar with unformatted media will cause crashes when attempts
are made to read/write it in some cases. This is because bs_factor is
zero and we divide by it causing an oops.
As the size of a non-accessible/non-existant media is really a bit of a
zen question it doesn't matter if non-existant media is 512 bytes per
sector or zero. Setting it to 1 causes us to generate 512 bytes/sector
accesses and error properly.
Based on a fix found lurking in an ancient bugzilla entry since about 2004 (ugghhh)
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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* atiixp: if DMA can't be used atiixp_config_drive_for_dma() should return 0,
atiixp_dma_check() will tune the correct PIO mode anyway
* jmicron: if DMA can't be used config_chipset_for_dma() should return 0,
micron_config_drive_for_dma() will tune the correct PIO mode anyway
config_jmicron_chipset_for_pio(drive, !speed) doesn't program
device transfer mode for speed != 0 (only wastes some CPU cycles
on ide_get_best_pio_mode() call) so remove it
* triflex: if DMA can't be used triflex_config_drive_for_dma() should return 0,
triflex_config_drive_xfer_rate() will tune correct PIO mode anyway
Above changes also fix (theoretical) issue when ->speedproc fails to set
device transfer mode (i.e. when ide_config_drive_speed() fails to program it)
but one of DMA transfer modes is already enabled on the device by the BIOS.
In such scenario ide_dma_enable() will incorrectly return true statement
and ->ide_dma_check will try to enable DMA on the device.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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* remember to clear reg2 bits for the current device before setting mode
* remove no longer needed hpt34x_clear_chipset()
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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* 'for-linus' of git://www.atmel.no/~hskinnemoen/linux/kernel/avr32:
[AVR32] Use per-controller spi_board_info structures
[AVR32] Warn, don't BUG if clk_disable is called too many times
[AVR32] Make sure all genclocks have a parent
[AVR32] Remove unnecessary sys_nfsservctl conditional
[AVR32] Wire up the SysV IPC calls properly
[AVR32] Define ioremap_nocache, ioport_map and ioport_unmap
[AVR32] Fix prototypes for __raw_writesb and friends
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Set up one spi_board_info array per controller and pass this to
at32_add_device_spi so that it can set up any GPIO pins for chip
selects based on this information.
Extracted from a patch by David Brownell and adapted slightly.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
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Print a helpful warning along with a stack dump if clk_disable is
called on a already-disabled clock. Remove the BUG_ON().
Extracted from a patch by David Brownell.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
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Initialize the parent field of each generic clock by looking at the
PM registers. This means that the genclock operations can always
assume that the parent field is non-null, so they don't have to
check. Also remove a few unnecessary BUG_ON()s.
Extracted from a patch by David Brownell.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
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kernel/sys_ni.c defines sys_nfsservctl as a weak alias for
sys_ni_syscall, so it's always safe to include it in the system
call table.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
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Wire up the individual sysvipc system calls and remove sys_ipc.
Strictly speaking, this breaks the ABI, but since sys_ipc never
worked anyway due to a silly bug, it isn't actually a regression.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
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These are all defined in terms of ioremap/iounmap since port I/O
isn't really different from memory-mapped I/O on AVR32.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
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The first parameter to __raw_writes[bwl] and __raw_reads[bwl] should
be a void __iomem *, not unsigned long.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
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* master.kernel.org:/pub/scm/linux/kernel/git/davej/agpgart:
[AGPGART] allow drm populated agp memory types cleanups
[AGPGART] intel-agp: Use ARRAY_SIZE macro when appropriate
[AGPGART] Add agp-type-to-mask-type method missing from some drivers.
[AGPGART] Don't try to remap i810 registers on resume.
[AGPGART] Allow drm-populated agp memory types
[AGPGART] compat ioctl
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Fix whitespace, braces, use kzalloc().
Cc: Dave Airlie <airlied@linux.ie>
Cc: Thomas Hellstrom <thomas@tungstengraphics.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Dave Jones <davej@redhat.com>
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use ARRAY_SIZE macro already defined in kernel.h
Signed-off-by: Ahmed S. Darwish <darwish.07@gmail.com>
Signed-off-by: Dave Jones <davej@redhat.com>
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Signed-off-by: Dave Jones <davej@redhat.com>
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We don't unmap them on the suspend path, so on resume
trying to remap will fail, and then result in an
oops the next time something tries to access them.
Signed-off-by: Dave Jones <davej@redhat.com>
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This patch allows drm to populate an agpgart structure with pages of its own.
It's needed for the new drm memory manager which dynamically flips pages in and out of AGP.
The patch modifies the generic functions as well as the intel agp driver. The intel drm driver is
currently the only one supporting the new memory manager.
Other agp drivers may need some minor fixing up once they have a corresponding memory manager enabled drm driver.
AGP memory types >= AGP_USER_TYPES are not populated by the agpgart driver, but the drm is expected
to do that, as well as taking care of cache- and tlb flushing when needed.
It's not possible to request these types from user space using agpgart ioctls.
The Intel driver also gets a new memory type for pages that can be bound cached to the intel GTT.
Signed-off-by: Thomas Hellstrom <thomas@tungstengraphics.com>
Signed-off-by: Dave Jones <davej@redhat.com>
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The following video card requires the agpgart driver ioctl
interface in order to detect video memory.
00:02.0 VGA compatible controller: Intel Corporation Mobile
945GM/GMS/940GML Express Integrated Graphics Controller (rev 03)
Tested on a Thinkpad Z61t, Xorg.0.log from a 32bit debian Xorg is at;
http://montezuma.homeunix.net/Xorg.0.log
Signed-off-by: Zwane Mwaikambo <zwane@infradead.org>
Signed-off-by: Dave Jones <davej@redhat.com>
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* master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq:
[CPUFREQ] Longhaul - Redo Longhaul ver. 2
[CPUFREQ] EPS - Correct 2nd brand test
[CPUFREQ] Longhaul - Separate frequency and voltage transition
[CPUFREQ] Longhaul - Models of Nehemiah
[CPUFREQ] Whitespace fixup
[CPUFREQ] Longhaul - Simplier minmult
[CPUFREQ] CPU_FREQ_TABLE shouldn't be a def_tristate
[CPUFREQ] ondemand governor use new cpufreq rwsem locking in work callback
[CPUFREQ] ondemand governor restructure the work callback
[CPUFREQ] Rewrite lock in cpufreq to eliminate cpufreq/hotplug related issues
[CPUFREQ] Remove hotplug cpu crap
[CPUFREQ] Enhanced PowerSaver driver
[CPUFREQ] Longhaul - Add VT8235 support
[CPUFREQ] Longhaul - Fix guess_fsb function
[CPUFREQ] Longhaul - Remove duplicate tables
[CPUFREQ] Longhaul - Introduce Nehemiah C
[CPUFREQ] fix cpuinfo_cur_freq for CPU_HW_PSTATE
[CPUFREQ] Longhaul - Remove "ignore_latency" option
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Start using v2 version of Longhaul when available. It provides
voltage scaling and can use ACPI C3 state. That's curious. CPU
will not change frequency on ACPI C3 when v1 is in use, but it will
when v2 is used. Driver will return max frequency all the time if
this isn't true for all processors. There is strange thing with
mobile voltage. Looks like only Nehemiah (C3-M) supports it.
Earlier processors have different mobile VRM (in docs), but I can't
find any which is using it. Looks like all are using VRM 8.5. So
fail for non Nehemiah with mobile VRM.
Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
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Solution for small, but nasty bug: access beyond end of f_table for C7 brand.
Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
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Signed-off-by: Dave Jones <davej@redhat.com>
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This change should make Longhaul more compatible with
both ver. 2 and Powersaver processors. Voltage transitions
will be done before or after frequency transition. That depends
on direction of change. I don't know how to force conservative
governor when voltage scaling is enabled, so there is only
a warning for user. Minimal voltage is calculated in different
way now because in this way more power is saved at lower
multipliers.
Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
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Borowed from VIA driver.
Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
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Signed-off-by: Dave Jones <davej@redhat.com>
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Simple cleanup in code which is setting minmult.
Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
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CPU_FREQ_TABLE enables helper code and gets select'ed when it's required.
Building it as a module when it's not required doesn't seem to make much sense.
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Dave Jones <davej@redhat.com>
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