aboutsummaryrefslogtreecommitdiffstats
path: root/arch/x86/math-emu/fpu_arith.c
blob: aeab24e083c40a5f4aa231b2346f5af3377b660f (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
/*---------------------------------------------------------------------------+
 |  fpu_arith.c                                                              |
 |                                                                           |
 | Code to implement the FPU register/register arithmetic instructions       |
 |                                                                           |
 | Copyright (C) 1992,1993,1997                                              |
 |                  W. Metzenthen, 22 Parker St, Ormond, Vic 3163, Australia |
 |                  E-mail   billm@suburbia.net                              |
 |                                                                           |
 |                                                                           |
 +---------------------------------------------------------------------------*/

#include "fpu_system.h"
#include "fpu_emu.h"
#include "control_w.h"
#include "status_w.h"

void fadd__(void)
{
	/* fadd st,st(i) */
	int i = FPU_rm;
	clear_C1();
	FPU_add(&st(i), FPU_gettagi(i), 0, control_word);
}

void fmul__(void)
{
	/* fmul st,st(i) */
	int i = FPU_rm;
	clear_C1();
	FPU_mul(&st(i), FPU_gettagi(i), 0, control_word);
}

void fsub__(void)
{
	/* fsub st,st(i) */
	clear_C1();
	FPU_sub(0, FPU_rm, control_word);
}

void fsubr_(void)
{
	/* fsubr st,st(i) */
	clear_C1();
	FPU_sub(REV, FPU_rm, control_word);
}

void fdiv__(void)
{
	/* fdiv st,st(i) */
	clear_C1();
	FPU_div(0, FPU_rm, control_word);
}

void fdivr_(void)
{
	/* fdivr st,st(i) */
	clear_C1();
	FPU_div(REV, FPU_rm, control_word);
}

void fadd_i(void)
{
	/* fadd st(i),st */
	int i = FPU_rm;
	clear_C1();
	FPU_add(&st(i), FPU_gettagi(i), i, control_word);
}

void fmul_i(void)
{
	/* fmul st(i),st */
	clear_C1();
	FPU_mul(&st(0), FPU_gettag0(), FPU_rm, control_word);
}

void fsubri(void)
{
	/* fsubr st(i),st */
	clear_C1();
	FPU_sub(DEST_RM, FPU_rm, control_word);
}

void fsub_i(void)
{
	/* fsub st(i),st */
	clear_C1();
	FPU_sub(REV | DEST_RM, FPU_rm, control_word);
}

void fdivri(void)
{
	/* fdivr st(i),st */
	clear_C1();
	FPU_div(DEST_RM, FPU_rm, control_word);
}

void fdiv_i(void)
{
	/* fdiv st(i),st */
	clear_C1();
	FPU_div(REV | DEST_RM, FPU_rm, control_word);
}

void faddp_(void)
{
	/* faddp st(i),st */
	int i = FPU_rm;
	clear_C1();
	if (FPU_add(&st(i), FPU_gettagi(i), i, control_word) >= 0)
		FPU_pop();
}

void fmulp_(void)
{
	/* fmulp st(i),st */
	clear_C1();
	if (FPU_mul(&st(0), FPU_gettag0(), FPU_rm, control_word) >= 0)
		FPU_pop();
}

void fsubrp(void)
{
	/* fsubrp st(i),st */
	clear_C1();
	if (FPU_sub(DEST_RM, FPU_rm, control_word) >= 0)
		FPU_pop();
}

void fsubp_(void)
{
	/* fsubp st(i),st */
	clear_C1();
	if (FPU_sub(REV | DEST_RM, FPU_rm, control_word) >= 0)
		FPU_pop();
}

void fdivrp(void)
{
	/* fdivrp st(i),st */
	clear_C1();
	if (FPU_div(DEST_RM, FPU_rm, control_word) >= 0)
		FPU_pop();
}

void fdivp_(void)
{
	/* fdivp st(i),st */
	clear_C1();
	if (FPU_div(REV | DEST_RM, FPU_rm, control_word) >= 0)
		FPU_pop();
}