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author | Luis R. Rodriguez <lrodriguez@atheros.com> | 2009-08-12 09:57:01 -0700 |
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committer | John W. Linville <linville@tuxdriver.com> | 2009-08-14 09:14:06 -0400 |
commit | 13311b00117ed1bf903cf8870432504631a7ce77 (patch) | |
tree | 66cd77633b183a0453fe2e8e077733ac26f2e7ab | |
parent | aeb63cfd4ccc813c204a0d81ad6c5a90c33d8f61 (diff) | |
download | kernel_samsung_tuna-13311b00117ed1bf903cf8870432504631a7ce77.zip kernel_samsung_tuna-13311b00117ed1bf903cf8870432504631a7ce77.tar.gz kernel_samsung_tuna-13311b00117ed1bf903cf8870432504631a7ce77.tar.bz2 |
ath5k: use bit shift operators for cache line size
This matches ath9k, providing consistency when reading both drivers.
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r-- | drivers/net/wireless/ath/ath5k/base.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c index 63c2b57..2b3cf39 100644 --- a/drivers/net/wireless/ath/ath5k/base.c +++ b/drivers/net/wireless/ath/ath5k/base.c @@ -471,7 +471,7 @@ ath5k_pci_probe(struct pci_dev *pdev, * DMA to work so force a reasonable value here if it * comes up zero. */ - csz = L1_CACHE_BYTES / sizeof(u32); + csz = L1_CACHE_BYTES >> 2; pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz); } /* @@ -544,7 +544,7 @@ ath5k_pci_probe(struct pci_dev *pdev, __set_bit(ATH_STAT_INVALID, sc->status); sc->iobase = mem; /* So we can unmap it on detach */ - sc->common.cachelsz = csz * sizeof(u32); /* convert to bytes */ + sc->common.cachelsz = csz << 2; /* convert to bytes */ sc->opmode = NL80211_IFTYPE_STATION; sc->bintval = 1000; mutex_init(&sc->lock); |