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authorFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>2010-08-10 18:03:23 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2010-08-11 08:59:21 -0700
commit7896bfa451b209f73bc8ec14721dcc2c5329a0a9 (patch)
treec69a6b86bb74b697a9c8386d5f4d4091fc6242cf
parent4565f0170dfc849b3629c27d769db800467baa62 (diff)
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dma-mapping: parisc: set ARCH_DMA_MINALIGN
Architectures that handle DMA-non-coherent memory need to set ARCH_DMA_MINALIGN to make sure that kmalloc'ed buffer is DMA-safe: the buffer doesn't share a cache with the others. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: Kyle McMartin <kyle@mcmartin.ca> Cc: Helge Deller <deller@gmx.de> Cc: James E.J. Bottomley <jejb@parisc-linux.org> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r--arch/parisc/include/asm/cache.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/parisc/include/asm/cache.h b/arch/parisc/include/asm/cache.h
index 45effe6..039880e 100644
--- a/arch/parisc/include/asm/cache.h
+++ b/arch/parisc/include/asm/cache.h
@@ -28,6 +28,8 @@
#define SMP_CACHE_BYTES L1_CACHE_BYTES
+#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
+
#define __read_mostly __attribute__((__section__(".data..read_mostly")))
void parisc_cache_init(void); /* initializes cache-flushing */