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| author | Ben Jones <ben.jones@imgtec.com> | 2011-07-26 17:12:04 +0100 |
|---|---|---|
| committer | Erik Gilling <konkers@android.com> | 2011-07-26 15:31:30 -0700 |
| commit | 79c61a32e1660d5eafe5507b3f31a5711a08b0b6 (patch) | |
| tree | 00de42683729c38d42507966b2c54d953015d2e8 | |
| parent | 6665c7bc97ee43e6c8b90f68f357ff20780bfacd (diff) | |
| download | kernel_samsung_tuna-79c61a32e1660d5eafe5507b3f31a5711a08b0b6.zip kernel_samsung_tuna-79c61a32e1660d5eafe5507b3f31a5711a08b0b6.tar.gz kernel_samsung_tuna-79c61a32e1660d5eafe5507b3f31a5711a08b0b6.tar.bz2 | |
gpu: pvr: Update to DDK 1.8.18.949
Fix sync-object related kernel memory corruption issues when using HWC
on Prime.
| -rw-r--r-- | drivers/gpu/pvr/omaplfb/omaplfb_displayclass.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/pvr/pvrversion.h | 4 | ||||
| -rw-r--r-- | drivers/gpu/pvr/queue.c | 18 |
3 files changed, 20 insertions, 4 deletions
diff --git a/drivers/gpu/pvr/omaplfb/omaplfb_displayclass.c b/drivers/gpu/pvr/omaplfb/omaplfb_displayclass.c index 4df4662..0fdd1b1 100644 --- a/drivers/gpu/pvr/omaplfb/omaplfb_displayclass.c +++ b/drivers/gpu/pvr/omaplfb/omaplfb_displayclass.c @@ -1231,7 +1231,7 @@ static OMAPLFB_DEVINFO *OMAPLFBInitDev(unsigned uiFBDevID) aui32SyncCountList[DC_FLIP_COMMAND][0] = 0; - aui32SyncCountList[DC_FLIP_COMMAND][1] = 2; + aui32SyncCountList[DC_FLIP_COMMAND][1] = 5; diff --git a/drivers/gpu/pvr/pvrversion.h b/drivers/gpu/pvr/pvrversion.h index 0270c9f..cd51214 100644 --- a/drivers/gpu/pvr/pvrversion.h +++ b/drivers/gpu/pvr/pvrversion.h @@ -36,7 +36,7 @@ #define PVRVERSION_FAMILY "eurasiacon.pj" #define PVRVERSION_BRANCHNAME "1.8.18" -#define PVRVERSION_BUILD 945 +#define PVRVERSION_BUILD 949 #define PVRVERSION_BSCONTROL "Unknown" #define PVRVERSION_STRING "1.8.18." PVR_STR2(PVRVERSION_BUILD) @@ -45,7 +45,7 @@ #define COPYRIGHT_TXT "Copyright (c) Imagination Technologies Ltd. All Rights Reserved." #define PVRVERSION_BUILD_HI 18 -#define PVRVERSION_BUILD_LO 945 +#define PVRVERSION_BUILD_LO 949 #define PVRVERSION_STRING_NUMERIC PVR_STR2(PVRVERSION_MAJ) "." PVR_STR2(PVRVERSION_MIN) "." PVR_STR2(PVRVERSION_BUILD_HI) "." PVR_STR2(PVRVERSION_BUILD_LO) #endif /* _PVRVERSION_H_ */ diff --git a/drivers/gpu/pvr/queue.c b/drivers/gpu/pvr/queue.c index a2c1dd4..4682094 100644 --- a/drivers/gpu/pvr/queue.c +++ b/drivers/gpu/pvr/queue.c @@ -40,6 +40,8 @@ typedef struct _DEVICE_COMMAND_DATA_ PFN_CMD_PROC pfnCmdProc; PCOMMAND_COMPLETE_DATA apsCmdCompleteData[DC_NUM_COMMANDS_PER_TYPE]; IMG_UINT32 ui32CCBOffset; + IMG_UINT32 ui32MaxDstSyncCount; + IMG_UINT32 ui32MaxSrcSyncCount; } DEVICE_COMMAND_DATA; @@ -557,6 +559,19 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVInsertCommandKM(PVRSRV_QUEUE_INFO *psQueue, PVRSRV_COMMAND *psCommand; IMG_SIZE_T ui32CommandSize; IMG_UINT32 i; + SYS_DATA *psSysData; + DEVICE_COMMAND_DATA *psDeviceCommandData; + + + SysAcquireData(&psSysData); + psDeviceCommandData = psSysData->apsDeviceCommandData[ui32DevIndex]; + + if ((psDeviceCommandData[CommandType].ui32MaxDstSyncCount < ui32DstSyncCount) || + (psDeviceCommandData[CommandType].ui32MaxSrcSyncCount < ui32SrcSyncCount)) + { + PVR_DPF((PVR_DBG_ERROR, "PVRSRVInsertCommandKM: Too many syncs")); + return PVRSRV_ERROR_INVALID_PARAMS; + } ui32DataByteSize = (ui32DataByteSize + 3UL) & ~3UL; @@ -1081,7 +1096,8 @@ PVRSRV_ERROR PVRSRVRegisterCmdProcListKM(IMG_UINT32 ui32DevIndex, { psDeviceCommandData[ui32CmdTypeCounter].pfnCmdProc = ppfnCmdProcList[ui32CmdTypeCounter]; psDeviceCommandData[ui32CmdTypeCounter].ui32CCBOffset = 0; - + psDeviceCommandData[ui32CmdTypeCounter].ui32MaxDstSyncCount = ui32MaxSyncsPerCmd[ui32CmdTypeCounter][0]; + psDeviceCommandData[ui32CmdTypeCounter].ui32MaxSrcSyncCount = ui32MaxSyncsPerCmd[ui32CmdTypeCounter][1]; for (ui32CmdCounter = 0; ui32CmdCounter < DC_NUM_COMMANDS_PER_TYPE; ui32CmdCounter++) { |