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| author | Rajendra Nayak <rnayak@ti.com> | 2009-11-16 13:36:53 +0000 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2009-11-17 14:14:10 -0800 |
| commit | 9346f48b26a4b48a7d56314bbb94e6b801e28316 (patch) | |
| tree | 4e7347ed8dd886bee6e15706e733515178e29401 | |
| parent | f7343deb0f6e7654c60e97606aea388b9da612c2 (diff) | |
| download | kernel_samsung_tuna-9346f48b26a4b48a7d56314bbb94e6b801e28316.zip kernel_samsung_tuna-9346f48b26a4b48a7d56314bbb94e6b801e28316.tar.gz kernel_samsung_tuna-9346f48b26a4b48a7d56314bbb94e6b801e28316.tar.bz2 | |
omap3: clock: Fix the DPLL freqsel computations
Fix the freqsel value computation. Use n instead of (n+1)
The formula in the TRM uses a zero-based N, hence the (n+1); however
at this point in the clock34xx.c code, N is one-based.
Hayati Bayrakdar <h-bayrakdar@ti.com> and Nishanth Menon <nm@ti.com> helped
track down this bug.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
[paul@pwsan.com: modified commit message]
Cc: Hayati Bayrakdar <h-bayrakdar@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
| -rw-r--r-- | arch/arm/mach-omap2/clock34xx.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index 489556e..7c5c00d 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -473,7 +473,7 @@ static u16 _omap3_dpll_compute_freqsel(struct clk *clk, u8 n) unsigned long fint; u16 f = 0; - fint = clk->dpll_data->clk_ref->rate / (n + 1); + fint = clk->dpll_data->clk_ref->rate / n; pr_debug("clock: fint is %lu\n", fint); |