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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2007-09-03 09:43:54 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-09-13 15:10:25 +0100
commita53d6fb83efc75bbd7876459e6e1291c4925103d (patch)
treeedf7d645e5b4254f19b6a60e803e1763b64846c9
parentc87ce65868bbf9bbea9c3f112ff8315302daf8f2 (diff)
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[ARM] realview: disable second GIC on RevB MPCore platforms
The second GIC asserts a permanent interrupt on Rev.B MPCore platforms. Disable initialisation of this GIC to avoid unbootable systems. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mach-realview/realview_eb.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 3dba666..ecec2f8 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -165,7 +165,7 @@ static void __init gic_init_irq(void)
#endif
gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29);
gic_cpu_init(0, __io_address(REALVIEW_GIC_CPU_BASE));
-#ifdef CONFIG_REALVIEW_MPCORE
+#if defined(CONFIG_REALVIEW_MPCORE) && !defined(CONFIG_REALVIEW_MPCORE_REVB)
gic_dist_init(1, __io_address(REALVIEW_GIC1_DIST_BASE), 64);
gic_cpu_init(1, __io_address(REALVIEW_GIC1_CPU_BASE));
gic_cascade_irq(1, IRQ_EB_IRQ1);