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| author | Nishanth Menon <nm@ti.com> | 2011-02-14 12:41:10 +0530 |
|---|---|---|
| committer | Kevin Hilman <khilman@ti.com> | 2011-05-31 09:05:02 -0700 |
| commit | c77be90468ca7c555968d1191cb780f05befc52c (patch) | |
| tree | 052672ec682d05d9848d027b1f2ac2ab2b5e0a6c | |
| parent | 644b305bc8dfebc55dfdf6bf882fcdf7b51da450 (diff) | |
| download | kernel_samsung_tuna-c77be90468ca7c555968d1191cb780f05befc52c.zip kernel_samsung_tuna-c77be90468ca7c555968d1191cb780f05befc52c.tar.gz kernel_samsung_tuna-c77be90468ca7c555968d1191cb780f05befc52c.tar.bz2 | |
OMAP3+: SR: disable interrupt by default
We will enable and disable interrupt on a need basis in the class
driver. We need to keep the IRQ disabled by default else the
forceupdate or vcbypass events could trigger events that we don't
need/expect to handle.
This is a preparation for SmartReflex AVS class drivers such as
class 2 and class 1.5 which would need to use interrupts. Existing
SmartReflex AVS class 3 driver does not require to use interrupts
and is not impacted by this change.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
| -rw-r--r-- | arch/arm/mach-omap2/smartreflex.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c index 3ee7261..616ef62 100644 --- a/arch/arm/mach-omap2/smartreflex.c +++ b/arch/arm/mach-omap2/smartreflex.c @@ -268,6 +268,7 @@ static int sr_late_init(struct omap_sr *sr_info) 0, name, (void *)sr_info); if (ret) goto error; + disable_irq(sr_info->irq); } if (pdata && pdata->enable_on_init) |