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| author | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2011-03-10 21:53:36 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-03-11 15:49:00 +0900 |
| commit | e24d208de6bc779c6bd97523cde2665a33f2be4d (patch) | |
| tree | 0846fd8a3a50abe246920d470827e35ffd983f96 | |
| parent | 03c4cd397cba38fc621a33c84d9698d39b286036 (diff) | |
| download | kernel_samsung_tuna-e24d208de6bc779c6bd97523cde2665a33f2be4d.zip kernel_samsung_tuna-e24d208de6bc779c6bd97523cde2665a33f2be4d.tar.gz kernel_samsung_tuna-e24d208de6bc779c6bd97523cde2665a33f2be4d.tar.bz2 | |
ARM: S5P: Extend MIPI-CSIS platform_data with the PHY control callback
Extend MIPI-CSIS driver's platform data structure with a callback
for D-PHY enable and reset control. Also add a flag indicating
whether the external MIPI-CSI (VDD18_MIPI) power supply should
be managed in the driver through the "vdd" power supply. On some
boards this regulator may be a fixed voltage regulator without
an inhibit function.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| -rw-r--r-- | arch/arm/plat-s5p/include/plat/mipi_csis.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/plat-s5p/include/plat/mipi_csis.h b/arch/arm/plat-s5p/include/plat/mipi_csis.h index 8b3ada8..9bd254c 100644 --- a/arch/arm/plat-s5p/include/plat/mipi_csis.h +++ b/arch/arm/plat-s5p/include/plat/mipi_csis.h @@ -11,18 +11,33 @@ #ifndef PLAT_S5P_MIPI_CSIS_H_ #define PLAT_S5P_MIPI_CSIS_H_ __FILE__ +struct platform_device; + /** * struct s5p_platform_mipi_csis - platform data for S5P MIPI-CSIS driver * @clk_rate: bus clock frequency * @lanes: number of data lanes used * @alignment: data alignment in bits * @hs_settle: HS-RX settle time + * @fixed_phy_vdd: false to enable external D-PHY regulator management in the + * driver or true in case this regulator has no enable function + * @phy_enable: pointer to a callback controlling D-PHY enable/reset */ struct s5p_platform_mipi_csis { unsigned long clk_rate; u8 lanes; u8 alignment; u8 hs_settle; + bool fixed_phy_vdd; + int (*phy_enable)(struct platform_device *pdev, bool on); }; +/** + * s5p_csis_phy_enable - global MIPI-CSI receiver D-PHY control + * @pdev: MIPI-CSIS platform device + * @on: true to enable D-PHY and deassert its reset + * false to disable D-PHY + */ +int s5p_csis_phy_enable(struct platform_device *pdev, bool on); + #endif /* PLAT_S5P_MIPI_CSIS_H_ */ |