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author | Ben Hutchings <bhutchings@solarflare.com> | 2009-05-15 06:04:12 +0000 |
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committer | David S. Miller <davem@davemloft.net> | 2009-05-17 21:03:42 -0700 |
commit | f2a3e626202a87734a47153935ec9d15c7fcf761 (patch) | |
tree | f3111bbc6d57e3905ea9a75e87583df4a44d67ed | |
parent | df18acca8eb13c8cf55fa45e9f9231dc51f64d98 (diff) | |
download | kernel_samsung_tuna-f2a3e626202a87734a47153935ec9d15c7fcf761.zip kernel_samsung_tuna-f2a3e626202a87734a47153935ec9d15c7fcf761.tar.gz kernel_samsung_tuna-f2a3e626202a87734a47153935ec9d15c7fcf761.tar.bz2 |
mdio: Add 10GBASE-T SNR register definition
These do not have an in-kernel user but may be useful to user-space.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | include/linux/mdio.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/include/linux/mdio.h b/include/linux/mdio.h index 26b4eb3..825f1e2 100644 --- a/include/linux/mdio.h +++ b/include/linux/mdio.h @@ -46,6 +46,8 @@ /* Media-dependent registers. */ #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */ +#define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A. + * Lanes B-D are numbered 134-136. */ #define MDIO_PMA_10GBR_FECABLE 170 /* 10GBASE-R FEC ability */ #define MDIO_PCS_10GBX_STAT1 24 /* 10GBASE-X PCS status 1 */ #define MDIO_PCS_10GBRT_STAT1 32 /* 10GBASE-R/-T PCS status 1 */ @@ -188,6 +190,11 @@ /* PMA 10GBASE-T TX power register. */ #define MDIO_PMA_10GBT_TXPWR_SHORT 0x0001 /* Short-reach mode */ +/* PMA 10GBASE-T SNR registers. */ +/* Value is SNR margin in dB, clamped to range [-127, 127], plus 0x8000. */ +#define MDIO_PMA_10GBT_SNR_BIAS 0x8000 +#define MDIO_PMA_10GBT_SNR_MAX 127 + /* PMA 10GBASE-R FEC ability register. */ #define MDIO_PMA_10GBR_FECABLE_ABLE 0x0001 /* FEC ability */ #define MDIO_PMA_10GBR_FECABLE_ERRABLE 0x0002 /* FEC error indic. ability */ |