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author | Ben Dooks <ben-linux@fluff.org> | 2007-02-13 13:02:52 +0100 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-02-14 15:04:22 +0000 |
commit | 0c6022d453ecebdace0ce15434c7108e158149ca (patch) | |
tree | 153ce6dd661059601fa8591d36e0b81c6663566a /Documentation/arm | |
parent | d2a76020e3a52c6370a7d603082b4cdb3db0703e (diff) | |
download | kernel_samsung_tuna-0c6022d453ecebdace0ce15434c7108e158149ca.zip kernel_samsung_tuna-0c6022d453ecebdace0ce15434c7108e158149ca.tar.gz kernel_samsung_tuna-0c6022d453ecebdace0ce15434c7108e158149ca.tar.bz2 |
[ARM] 4177/1: S3C24XX: Add DMA channel allocation order
Allow the CPU code, and any board specific initialisation
code to change the allocation order of the DMA channels,
or stop a peripheral allocating any DMA at-all.
This is due to the scarce mapping of DMA channels on
some earlier S3C24XX cpus, where the selection changes
depending on the channel in use.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'Documentation/arm')
-rw-r--r-- | Documentation/arm/Samsung-S3C24XX/DMA.txt | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/Documentation/arm/Samsung-S3C24XX/DMA.txt b/Documentation/arm/Samsung-S3C24XX/DMA.txt new file mode 100644 index 0000000..37f4edc --- /dev/null +++ b/Documentation/arm/Samsung-S3C24XX/DMA.txt @@ -0,0 +1,46 @@ + S3C2410 DMA + =========== + +Introduction +------------ + + The kernel provides an interface to manage DMA transfers + using the DMA channels in the cpu, so that the central + duty of managing channel mappings, and programming the + channel generators is in one place. + + +DMA Channel Ordering +-------------------- + + Many of the range do not have connections for the DMA + channels to all sources, which means that some devices + have a restricted number of channels that can be used. + + To allow flexibilty for each cpu type and board, the + dma code can be given an dma ordering structure which + allows the order of channel search to be specified, as + well as allowing the prohibition of certain claims. + + struct s3c24xx_dma_order has a list of channels, and + each channel within has a slot for a list of dma + channel numbers. The slots are searched in order, for + the presence of a dma channel number with DMA_CH_VALID + orred in. + + If the order has the flag DMA_CH_NEVER set, then after + checking the channel list, the system will return no + found channel, thus denying the request. + + A board support file can call s3c24xx_dma_order_set() + to register an complete ordering set. The routine will + copy the data, so the original can be discared with + __initdata. + + +Authour +------- + +Ben Dooks, +Copyright (c) 2007 Ben Dooks, Simtec Electronics +Licensed under the GPL v2 |