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author | Hyok S. Choi <hyok.choi@samsung.com> | 2006-09-26 17:36:37 +0900 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-09-27 17:34:30 +0100 |
commit | f12d0d7c7786af39435ef6ae9defe47fb58f6091 (patch) | |
tree | 03361f2b925754f2acf4f311df2122f844d3d4fe /arch/arm/boot | |
parent | fefdaa06ccdde394be865ed76509be82813e425b (diff) | |
download | kernel_samsung_tuna-f12d0d7c7786af39435ef6ae9defe47fb58f6091.zip kernel_samsung_tuna-f12d0d7c7786af39435ef6ae9defe47fb58f6091.tar.gz kernel_samsung_tuna-f12d0d7c7786af39435ef6ae9defe47fb58f6091.tar.bz2 |
[ARM] nommu: manage the CP15 things
All the current CP15 access codes in ARM arch can be categorized and
conditioned by the defines as follows:
Related operation Safe condition
a. any CP15 access !CPU_CP15
b. alignment trap CPU_CP15_MMU
c. D-cache(C-bit) CPU_CP15
d. I-cache CPU_CP15 && !( CPU_ARM610 || CPU_ARM710 ||
CPU_ARM720 || CPU_ARM740 ||
CPU_XSCALE || CPU_XSC3 )
e. alternate vector CPU_CP15 && !CPU_ARM740
f. TTB CPU_CP15_MMU
g. Domain CPU_CP15_MMU
h. FSR/FAR CPU_CP15_MMU
For example, alternate vector is supported if and only if
"CPU_CP15 && !CPU_ARM740" is satisfied.
Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/compressed/Makefile | 4 | ||||
-rw-r--r-- | arch/arm/boot/compressed/head.S | 6 |
2 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index 2adc152..adddc71 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile @@ -51,7 +51,11 @@ OBJS += head-at91rm9200.o endif ifeq ($(CONFIG_CPU_BIG_ENDIAN),y) +ifeq ($(CONFIG_CPU_CP15),y) OBJS += big-endian.o +else +# The endian should be set by h/w design. +endif endif # diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index 75df1f7..e5ab51b 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -82,9 +82,11 @@ kphex r6, 8 /* processor id */ kputc #':' kphex r7, 8 /* architecture id */ +#ifdef CONFIG_CPU_CP15 kputc #':' mrc p15, 0, r0, c1, c0 kphex r0, 8 /* control reg */ +#endif kputc #'\n' kphex r5, 8 /* decompressed kernel start */ kputc #'-' @@ -507,7 +509,11 @@ call_kernel: bl cache_clean_flush */ call_cache_fn: adr r12, proc_types +#ifdef CONFIG_CPU_CP15 mrc p15, 0, r6, c0, c0 @ get processor ID +#else + ldr r6, =CONFIG_PROCESSOR_ID +#endif 1: ldr r1, [r12, #0] @ get value ldr r2, [r12, #4] @ get mask eor r1, r1, r6 @ (real ^ match) |