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authorCatalin Marinas <catalin.marinas@arm.com>2010-01-26 19:09:42 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-02-15 21:39:51 +0000
commit11805bcfa411c816b7c76fc40724be6733c74ffc (patch)
tree09c5c6c91deffb60339f027779521bafa42921ce /arch/arm/include/asm/mmu.h
parent48ab7e09e0a7c00a217f87e4b57dfbee9c603e79 (diff)
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ARM: 5905/1: ARM: Global ASID allocation on SMP
The current ASID allocation algorithm doesn't ensure the notification of the other CPUs when the ASID rolls over. This may lead to two processes using the same ASID (but different generation) or multiple threads of the same process using different ASIDs. This patch adds the broadcasting of the ASID rollover event to the other CPUs. To avoid a race on multiple CPUs modifying "cpu_last_asid" during the handling of the broadcast, the ASID numbering now starts at "smp_processor_id() + 1". At rollover, the cpu_last_asid will be set to NR_CPUS. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include/asm/mmu.h')
-rw-r--r--arch/arm/include/asm/mmu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h
index b561584..68870c7 100644
--- a/arch/arm/include/asm/mmu.h
+++ b/arch/arm/include/asm/mmu.h
@@ -6,6 +6,7 @@
typedef struct {
#ifdef CONFIG_CPU_HAS_ASID
unsigned int id;
+ spinlock_t id_lock;
#endif
unsigned int kvm_seq;
} mm_context_t;