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authorTodd Poynor <toddpoynor@google.com>2012-05-08 11:39:15 -0700
committerTodd Poynor <toddpoynor@google.com>2012-05-08 11:39:15 -0700
commit6bb60d745d723659777f56e0871d40ee94d94773 (patch)
tree0db925b25a18621f75b429ef81dee0cfc66a130f /arch/arm/include/asm
parentd333f20f36615711c33d50f47cf2ca097c678010 (diff)
parent52f91d889a2c2a0f9e0b5e97fa7be8b584834016 (diff)
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Merge branch 'android-3.0' into android-omap-3.0
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r--arch/arm/include/asm/tls.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/tls.h b/arch/arm/include/asm/tls.h
index 60843eb..73409e6 100644
--- a/arch/arm/include/asm/tls.h
+++ b/arch/arm/include/asm/tls.h
@@ -7,6 +7,8 @@
.macro set_tls_v6k, tp, tmp1, tmp2
mcr p15, 0, \tp, c13, c0, 3 @ set TLS register
+ mov \tmp1, #0
+ mcr p15, 0, \tmp1, c13, c0, 2 @ clear user r/w TLS register
.endm
.macro set_tls_v6, tp, tmp1, tmp2
@@ -15,6 +17,8 @@
mov \tmp2, #0xffff0fff
tst \tmp1, #HWCAP_TLS @ hardware TLS available?
mcrne p15, 0, \tp, c13, c0, 3 @ yes, set TLS register
+ movne \tmp1, #0
+ mcrne p15, 0, \tmp1, c13, c0, 2 @ clear user r/w TLS register
streq \tp, [\tmp2, #-15] @ set TLS value at 0xffff0ff0
.endm