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authorDan Williams <dan.j.williams@intel.com>2009-09-08 14:32:24 -0700
committerDan Williams <dan.j.williams@intel.com>2009-09-08 14:32:24 -0700
commita348a7e6fdbcd2d5192a09719a479bb238fde727 (patch)
tree5ff94185f4e5a810777469d7fe7832a8ec2d3430 /arch/arm/mach-davinci/include/mach/debug-macro.S
parent808347f6a31792079e345ec865e9cfcb6e8ae6b2 (diff)
parent28d0325ce6e0a52f53d8af687e6427fee59004d3 (diff)
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Merge commit 'v2.6.31-rc1' into dmaengine
Diffstat (limited to 'arch/arm/mach-davinci/include/mach/debug-macro.S')
-rw-r--r--arch/arm/mach-davinci/include/mach/debug-macro.S31
1 files changed, 29 insertions, 2 deletions
diff --git a/arch/arm/mach-davinci/include/mach/debug-macro.S b/arch/arm/mach-davinci/include/mach/debug-macro.S
index e6c0f0d..de3fc21 100644
--- a/arch/arm/mach-davinci/include/mach/debug-macro.S
+++ b/arch/arm/mach-davinci/include/mach/debug-macro.S
@@ -9,6 +9,16 @@
* or implied.
*/
+/* Modifications
+ * Jan 2009 Chaithrika U S Added senduart, busyuart, waituart
+ * macros, based on debug-8250.S file
+ * but using 32-bit accesses required for
+ * some davinci devices.
+ */
+
+#include <linux/serial_reg.h>
+#define UART_SHIFT 2
+
.macro addruart, rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
@@ -17,5 +27,22 @@
orr \rx, \rx, #0x00c20000 @ UART 0
.endm
-#define UART_SHIFT 2
-#include <asm/hardware/debug-8250.S>
+ .macro senduart,rd,rx
+ str \rd, [\rx, #UART_TX << UART_SHIFT]
+ .endm
+
+ .macro busyuart,rd,rx
+1002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT]
+ and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
+ teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
+ bne 1002b
+ .endm
+
+ .macro waituart,rd,rx
+#ifdef FLOW_CONTROL
+1001: ldr \rd, [\rx, #UART_MSR << UART_SHIFT]
+ tst \rd, #UART_MSR_CTS
+ beq 1001b
+#endif
+ .endm
+