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| author | Marek Szyprowski <m.szyprowski@samsung.com> | 2011-03-15 21:17:43 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-03-15 21:17:43 +0900 |
| commit | 721bbd4a06e83995ac1679d9cdca19a608fb0122 (patch) | |
| tree | 5e2612cdade5348607e2de8e87f1a056c0e6f142 /arch/arm/mach-exynos4/include | |
| parent | a43efddc3bf8b143ff9352763cd39d425db14d27 (diff) | |
| download | kernel_samsung_tuna-721bbd4a06e83995ac1679d9cdca19a608fb0122.zip kernel_samsung_tuna-721bbd4a06e83995ac1679d9cdca19a608fb0122.tar.gz kernel_samsung_tuna-721bbd4a06e83995ac1679d9cdca19a608fb0122.tar.bz2 | |
ARM: EXYNOS4: Add support for gpio interrupts
This patch adds support for gpio interrupts on Samsung EXYNOS4 platform.
Common s5p-gpioint.c code is used for handling gpio interrupts. Each gpio
line that needs gpio interrupt support must be later registered with
s5p_register_gpio_interrupt() function.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos4/include')
| -rw-r--r-- | arch/arm/mach-exynos4/include/mach/irqs.h | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h b/arch/arm/mach-exynos4/include/mach/irqs.h index 1db1de8..5d03730 100644 --- a/arch/arm/mach-exynos4/include/mach/irqs.h +++ b/arch/arm/mach-exynos4/include/mach/irqs.h @@ -85,6 +85,9 @@ #define IRQ_RTC_ALARM COMBINER_IRQ(23, 0) #define IRQ_RTC_TIC COMBINER_IRQ(23, 1) +#define IRQ_GPIO_XB COMBINER_IRQ(24, 0) +#define IRQ_GPIO_XA COMBINER_IRQ(24, 1) + #define IRQ_UART0 COMBINER_IRQ(26, 0) #define IRQ_UART1 COMBINER_IRQ(26, 1) #define IRQ_UART2 COMBINER_IRQ(26, 2) @@ -145,8 +148,13 @@ #define S5P_EINT_BASE1 (S5P_IRQ_EINT_BASE + 0) #define S5P_EINT_BASE2 (S5P_IRQ_EINT_BASE + 16) -/* Set the default NR_IRQS */ +/* optional GPIO interrupts */ +#define S5P_GPIOINT_BASE (S5P_IRQ_EINT_BASE + 32) +#define IRQ_GPIO1_NR_GROUPS 16 +#define IRQ_GPIO2_NR_GROUPS 9 +#define IRQ_GPIO_END (S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT) -#define NR_IRQS (S5P_IRQ_EINT_BASE + 32) +/* Set the default NR_IRQS */ +#define NR_IRQS (IRQ_GPIO_END) #endif /* __ASM_ARCH_IRQS_H */ |