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| author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2009-11-12 22:56:29 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2009-11-27 08:32:37 +0100 |
| commit | 97adeda043d4c2e11dcaca64a7e5fd0c4574c3fe (patch) | |
| tree | 6ffd371e9c0b8eea1a0f315e91a4dcb01d41fc07 /arch/arm/mach-mx2 | |
| parent | 4998f1a30cf8e21c5bc0766fde4fa58e1adabd72 (diff) | |
| download | kernel_samsung_tuna-97adeda043d4c2e11dcaca64a7e5fd0c4574c3fe.zip kernel_samsung_tuna-97adeda043d4c2e11dcaca64a7e5fd0c4574c3fe.tar.gz kernel_samsung_tuna-97adeda043d4c2e11dcaca64a7e5fd0c4574c3fe.tar.bz2 | |
IMX: don't disable the uart clock if DEBUG_LL uses it
Before the clock was left enabled only for DEBUG_LL_CONSOLE which
requires an additional patch to exist at all. With this patch applied
DEBUG_LL_CONSOLE depends on DEBUG_LL, so this doesn't break.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx2')
| -rw-r--r-- | arch/arm/mach-mx2/clock_imx21.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-mx2/clock_imx27.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-mx2/clock_imx21.c b/arch/arm/mach-mx2/clock_imx21.c index eede798..91901b5 100644 --- a/arch/arm/mach-mx2/clock_imx21.c +++ b/arch/arm/mach-mx2/clock_imx21.c @@ -1000,7 +1000,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href) clk_enable(&per_clk[0]); clk_enable(&gpio_clk); -#ifdef CONFIG_DEBUG_LL_CONSOLE +#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC) clk_enable(&uart_clk[0]); #endif diff --git a/arch/arm/mach-mx2/clock_imx27.c b/arch/arm/mach-mx2/clock_imx27.c index aa640b4..b010bf9 100644 --- a/arch/arm/mach-mx2/clock_imx27.c +++ b/arch/arm/mach-mx2/clock_imx27.c @@ -751,7 +751,7 @@ int __init mx27_clocks_init(unsigned long fref) clk_enable(&emi_clk); clk_enable(&iim_clk); -#ifdef CONFIG_DEBUG_LL_CONSOLE +#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC) clk_enable(&uart1_clk); #endif |