diff options
| author | Vikram Pandita <vikram.pandita@ti.com> | 2011-11-01 01:07:02 -0700 |
|---|---|---|
| committer | Todd Poynor <toddpoynor@google.com> | 2011-11-03 16:21:49 -0700 |
| commit | 339e18619101575a5d16c2ec50a10bce5f99b890 (patch) | |
| tree | 36707aa9d11119359cd3f201f6effd958f2707b0 /arch/arm/mach-omap2/clock.h | |
| parent | e8e054f7239c901c0938e0f6e392c759aab66d8c (diff) | |
| download | kernel_samsung_tuna-339e18619101575a5d16c2ec50a10bce5f99b890.zip kernel_samsung_tuna-339e18619101575a5d16c2ec50a10bce5f99b890.tar.gz kernel_samsung_tuna-339e18619101575a5d16c2ec50a10bce5f99b890.tar.bz2 | |
omap: usb-dpll: recovery from failed dpll locking
If usbdpll failed to lock, program the usbdpll to MN bypass.
This will reset the DPLL state machine resulting in reset value
for register CM_CLKSEL_DPLL_USB.
So after MN bypass, reprogram CM_CLKSEL_DPLL_USB so that USBDPLL
continues to supply two clocks at: 480Mhz and 960Mhz.
Force generate a request to PRCM by not putting dpll in autoidle.
CM_DIV_M2_DPLL_USB.DPLL_CLKOUT_GATE_CTRL = 1
CM_CLKDCOLDO_DPLL_USB.DPLL_CLKDCOLDO_GATE_CTRL = 1
Switch back to lock mode and wait for IDLEST to indicate success locking.
Change-Id: Icd3c4e1bf13d8a4c62889feceecfc7cba68b727f
Signed-off-by: Vikram Pandita <vikram.pandita@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/clock.h')
| -rw-r--r-- | arch/arm/mach-omap2/clock.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index da332d2..450aabf 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h @@ -41,6 +41,7 @@ /* CM_CLKEN_PLL*.EN* bit values - not all are available for every DPLL */ #define DPLL_LOW_POWER_STOP 0x1 +#define DPLL_MN_BYPASS 0x4 #define DPLL_LOW_POWER_BYPASS 0x5 #define DPLL_LOCKED 0x7 |