diff options
| author | Konstantin Shlyakhovoy <x0155534@ti.com> | 2011-10-27 15:07:21 +0300 |
|---|---|---|
| committer | Ziyann <jaraidaniel@gmail.com> | 2014-10-01 12:55:29 +0200 |
| commit | c47f9b9083293732c8e3ab2756587cc0efc9d4aa (patch) | |
| tree | 3518fc82b0db040b59d27b974b70b34a525eed96 /arch/arm/mach-omap2/omap4_trim_quirks.c | |
| parent | 0dea5198608025757695490485c1f03a3abe283c (diff) | |
| download | kernel_samsung_tuna-c47f9b9083293732c8e3ab2756587cc0efc9d4aa.zip kernel_samsung_tuna-c47f9b9083293732c8e3ab2756587cc0efc9d4aa.tar.gz kernel_samsung_tuna-c47f9b9083293732c8e3ab2756587cc0efc9d4aa.tar.bz2 | |
ARM: OMAP4470: DSS: AVDAC removed
The access to AVDAC registes was removed for OMAP4470.
Signed-off-by: K.Shlyakhovoy <x0155534@ti.com>
Change-Id: I4c3aa87cae8b2775f7ff2043679fd2f054754c0d
Conflicts:
arch/arm/mach-omap2/omap4_trim_quirks.c
Diffstat (limited to 'arch/arm/mach-omap2/omap4_trim_quirks.c')
| -rwxr-xr-x[-rw-r--r--] | arch/arm/mach-omap2/omap4_trim_quirks.c | 19 |
1 files changed, 11 insertions, 8 deletions
diff --git a/arch/arm/mach-omap2/omap4_trim_quirks.c b/arch/arm/mach-omap2/omap4_trim_quirks.c index dd96726..d6d33c5 100644..100755 --- a/arch/arm/mach-omap2/omap4_trim_quirks.c +++ b/arch/arm/mach-omap2/omap4_trim_quirks.c @@ -20,6 +20,7 @@ #define OMAP4_DPLL_MPU_TRIMMED_VAL_2P4 (0x1 << 18) #define OMAP4_DPLL_MPU_TRIMMED_VAL_3P0 (0x3 << 18) #define OMAP4_DPLL_MPU_TRIMMED_MASK (BIT(19) | BIT(18)) + /* * Trim value has to be written to CONTROL_EFUSE_2 according to * OMAP4430 errata i684 (version B) @@ -28,7 +29,6 @@ #define OMAP4_LPDDR2_I684_FIX_VALUE 0x004E4000 #define OMAP4_PROD_ID_I684_MASK 0x000C0000 - static bool bgap_trim_sw_overide; static bool dpll_trim_override; static bool ddr_io_trim_override; @@ -60,13 +60,16 @@ int omap4_ldo_trim_configure(void) OMAP4_CTRL_MODULE_CORE_LDOSRAM_IVA_VOLTAGE_CTRL); } - /* For all trimmed and untrimmed write value as per recomendation */ - val = 0x10 << OMAP4_AVDAC_TRIM_BYTE0_SHIFT; - val |= 0x01 << OMAP4_AVDAC_TRIM_BYTE1_SHIFT; - val |= 0x4d << OMAP4_AVDAC_TRIM_BYTE2_SHIFT; - val |= 0x1C << OMAP4_AVDAC_TRIM_BYTE3_SHIFT; - omap4_ctrl_pad_writel(val, - OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_1); + /* OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_1 is reserved for 4470 */ + if (!cpu_is_omap447x()) { + /* For all trimmed and untrimmed write recommended value */ + val = 0x10 << OMAP4_AVDAC_TRIM_BYTE0_SHIFT; + val |= 0x01 << OMAP4_AVDAC_TRIM_BYTE1_SHIFT; + val |= 0x4d << OMAP4_AVDAC_TRIM_BYTE2_SHIFT; + val |= 0x1C << OMAP4_AVDAC_TRIM_BYTE3_SHIFT; + omap4_ctrl_pad_writel(val, + OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_1); + } /* DDR I/O Trim override as per erratum i684 */ if (ddr_io_trim_override) { |