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authorKeerthy <j-keerthy@ti.com>2011-06-15 14:09:13 -0500
committerColin Cross <ccross@android.com>2011-08-04 13:08:20 -0700
commitec4dedf4d7d2be34dc72cbb395af9a00c0657fd6 (patch)
tree98b64476f4ce27917d7a4488f8ad1e2037f72716 /arch/arm/mach-omap2/omap_hwmod_44xx_data.c
parente817713d04f4098be0cca0cdb862bcd9d47bf6e0 (diff)
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OMAP: HWMOD data for the on-die temp sensor
HWMOD data for the OMAP on-die temp sensor Change-Id: If8addc5284adbc7f386f84d8017c6ab9737ebf78 Signed-off-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: Moiz Sonasath <m-sonasath@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_44xx_data.c')
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c63
1 files changed, 63 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 333e813..2b5ea28 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -1036,6 +1036,66 @@ static struct omap_hwmod omap44xx_aess_hwmod = {
};
/*
+ * 'ctrl_module' class
+ * attila core control module
+ */
+
+static struct omap_hwmod_class_sysconfig omap44xx_ctrl_module_sysc = {
+ .rev_offs = 0x0000,
+ .sysc_offs = 0x0010,
+ .sysc_flags = SYSC_HAS_SIDLEMODE,
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+ SIDLE_SMART_WKUP),
+ .sysc_fields = &omap_hwmod_sysc_type2,
+};
+
+static struct omap_hwmod_class omap44xx_ctrl_module_hwmod_class = {
+ .name = "ctrl_module",
+ .sysc = &omap44xx_ctrl_module_sysc,
+};
+
+/* ctrl_module_core */
+static struct omap_hwmod omap44xx_ctrl_module_core_hwmod;
+static struct omap_hwmod_irq_info omap44xx_ctrl_module_core_irqs[] = {
+ { .name = "sec_evts", .irq = 8 + OMAP44XX_IRQ_GIC_START },
+ { .name = "thermal_alert", .irq = 126 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_ctrl_module_core_addrs[] = {
+ {
+ .pa_start = 0x4a002000,
+ .pa_end = 0x4a0027ff,
+
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_cfg -> ctrl_module_core */
+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ctrl_module_core = {
+ .master = &omap44xx_l4_cfg_hwmod,
+ .slave = &omap44xx_ctrl_module_core_hwmod,
+ .clk = "l4_div_ck",
+ .addr = omap44xx_ctrl_module_core_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_ctrl_module_core_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* ctrl_module_core slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_ctrl_module_core_slaves[] = {
+ &omap44xx_l4_cfg__ctrl_module_core,
+};
+
+static struct omap_hwmod omap44xx_ctrl_module_core_hwmod = {
+ .name = "ctrl_module_core",
+ .class = &omap44xx_ctrl_module_hwmod_class,
+ .mpu_irqs = omap44xx_ctrl_module_core_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_ctrl_module_core_irqs),
+ .main_clk = "l4_div_ck",
+ .slaves = omap44xx_ctrl_module_core_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_ctrl_module_core_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP446X),
+};
+/*
* 'bandgap' class
* bangap reference for ldo regulators
*/
@@ -5947,6 +6007,9 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
&omap44xx_timer10_hwmod,
&omap44xx_timer11_hwmod,
+ /* ctrl module class */
+ &omap44xx_ctrl_module_core_hwmod,
+
/* uart class */
&omap44xx_uart1_hwmod,
&omap44xx_uart2_hwmod,