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| author | Girish S Ghongdemath <girishsg@ti.com> | 2011-12-15 16:01:16 -0600 |
|---|---|---|
| committer | Ziyann <jaraidaniel@gmail.com> | 2014-10-01 12:55:10 +0200 |
| commit | 29a7be03a49f0df8e15e300dcf4b5df2a4089cca (patch) | |
| tree | c0173c05746f4c9f2fc0091270326c1336934624 /arch/arm/mach-omap2/pm44xx.c | |
| parent | 9b0267d649217178381a8a5f9044e617b0c679ca (diff) | |
| download | kernel_samsung_tuna-29a7be03a49f0df8e15e300dcf4b5df2a4089cca.zip kernel_samsung_tuna-29a7be03a49f0df8e15e300dcf4b5df2a4089cca.tar.gz kernel_samsung_tuna-29a7be03a49f0df8e15e300dcf4b5df2a4089cca.tar.bz2 | |
OMAP4: PM: L3INIT allow only CSwR
L3INIT powerstate supports ON, INA, CSwR and OSwR. If OSwR
is enabled EHCI/remote wakeup feature is broken. Till EHCI
IO wakeup is in place allow only CSwR on L3INIT. Power impact
in idle path will be less than 1mA.
REVISIT: For setting OSwR on L3INIT with proper fix in EHCI for IO
wakeup.
Change-Id: I64ada3a307d6cd81483ce6bba684f166d76868b6
Signed-off-by: Girish S G <girishsg@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/pm44xx.c')
| -rwxr-xr-x | arch/arm/mach-omap2/pm44xx.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c index 31ff67a..5c78faa 100755 --- a/arch/arm/mach-omap2/pm44xx.c +++ b/arch/arm/mach-omap2/pm44xx.c @@ -678,6 +678,11 @@ static int omap4_restore_pwdms_after_suspend(void) ret = -1; } + if (!strcmp(pwrst->pwrdm->name, "l3init_pwrdm")) { + pwrdm_set_logic_retst(pwrst->pwrdm, PWRDM_POWER_RET); + continue; + } + /* If state already ON due to h/w dep, don't do anything */ if (cstate == PWRDM_POWER_ON) continue; @@ -702,9 +707,6 @@ static int omap4_restore_pwdms_after_suspend(void) if (pwrst->saved_state > cstate) continue; - if (pwrst->pwrdm->pwrsts) - omap_set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state); - if (pwrst->pwrdm->pwrsts_logic_ret) pwrdm_set_logic_retst(pwrst->pwrdm, pwrst->saved_logic_state); @@ -902,6 +904,9 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) (!strcmp(pwrdm->name, "cpu0_pwrdm")) || (!strcmp(pwrdm->name, "cpu1_pwrdm"))) pwrst->next_state = PWRDM_POWER_ON; + else if (!strcmp(pwrdm->name, "l3init_pwrdm")) + /* REVISIT: Remove when EHCI IO wakeup is fixed */ + ret = _set_pwrdm_state(pwrst, PWRDM_POWER_RET, PWRDM_POWER_RET); else ret = _set_pwrdm_state(pwrst, state, logic_state); |