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| author | Nishanth Menon <nm@ti.com> | 2011-05-17 15:20:08 -0500 |
|---|---|---|
| committer | Nishanth Menon <nm@ti.com> | 2011-06-13 16:44:26 -0500 |
| commit | a5903ce951f692c2418c048ee177f7248d5878d6 (patch) | |
| tree | 5d8275f19c60fd38e038f56fcc4ebf036ed63aab /arch/arm/mach-omap2/prm-regbits-44xx.h | |
| parent | 1dab90eb1990f418c27a91e73d644dc6ed67c2c0 (diff) | |
| download | kernel_samsung_tuna-a5903ce951f692c2418c048ee177f7248d5878d6.zip kernel_samsung_tuna-a5903ce951f692c2418c048ee177f7248d5878d6.tar.gz kernel_samsung_tuna-a5903ce951f692c2418c048ee177f7248d5878d6.tar.bz2 | |
OMAP4: PM: VC: support configuration of i2c clks
Patch "OMAP2+: voltage: split voltage controller (VC) code into dedicated layer"
splits out the hardcoded value in the code to vc's channel init.
This patch further isolates the configuration to remove out PMIC specific
configuration as high and low times are pmic specific.
Values are updated as well based on latest TI analysis done in android k35
kernel.
As discussed in http://marc.info/?l=linux-omap&m=130569587107997&w=2
we should, if possible isolate the changes away into board, PMIC and OMAP
specific parameters, to do this, we need a better understanding of the equations
involved, which we dont at this point of time and have to depend on emperical
values. This patch however is necessary instead of the hardcoded assumptions
in place.
Signed-off-by: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/prm-regbits-44xx.h')
| -rw-r--r-- | arch/arm/mach-omap2/prm-regbits-44xx.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/prm-regbits-44xx.h b/arch/arm/mach-omap2/prm-regbits-44xx.h index 2ae607e..175412a 100644 --- a/arch/arm/mach-omap2/prm-regbits-44xx.h +++ b/arch/arm/mach-omap2/prm-regbits-44xx.h @@ -1071,6 +1071,14 @@ #define OMAP4430_SCLL_SHIFT 8 #define OMAP4430_SCLL_MASK (0xff << 8) +/* Used by PRM_VC_CFG_I2C_CLK */ +#define OMAP4430_HSCLH_SHIFT 16 +#define OMAP4430_HSCLH_MASK (0xff << 16) + +/* Used by PRM_VC_CFG_I2C_CLK */ +#define OMAP4430_HSCLL_SHIFT 24 +#define OMAP4430_HSCLL_MASK (0xff << 24) + /* Used by PRM_RSTST */ #define OMAP4430_SECURE_WDT_RST_SHIFT 4 #define OMAP4430_SECURE_WDT_RST_MASK (1 << 4) |