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author | Avinash.H.M <avinashhm@ti.com> | 2011-07-07 19:20:10 -0700 |
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committer | Nishanth Menon <nm@ti.com> | 2011-07-10 23:26:56 -0700 |
commit | 9726f4dba459bffe9603b537aec94f3964378d28 (patch) | |
tree | e0862a92994ba06669715a7e2ecca9ae1f9580fb /arch/arm/mach-omap2/vc.h | |
parent | 6a2b03494e9cab723836442dc7f31e5b905a0009 (diff) | |
download | kernel_samsung_tuna-9726f4dba459bffe9603b537aec94f3964378d28.zip kernel_samsung_tuna-9726f4dba459bffe9603b537aec94f3964378d28.tar.gz kernel_samsung_tuna-9726f4dba459bffe9603b537aec94f3964378d28.tar.bz2 |
OMAP3+: VC: calculate the setup times dynamically
To scale to the voltage during states such as retention, the PMIC requires some
voltage stabilization time. This depends on the worst case ramp voltage and the
sysclk. Support is added to dynamically calculate the ramp counts and update
the appropriate registers due to the impact of Errata Id: i623(Retention/Sleep
Voltage Transitions Ramp Time) on OMAP4430 silicon alone. This errata states
that the ramp time configuration in the PRM_VOLTSETUP_<VD name>_OFF and
PRM_VOLTSETUP_<VD name>_RET_SLEEP is 64, 256, 512, 2048 instead of the
expected 16, 64, 128, 512 sysclk cycles for the values 0, 1, 2 3 configured in
the register field. Since sysclk is a variant on OMAP4, dynamic computation
allows us to support multiple silicon variants runtime.
Acked-by: Todd Poynor <toddpoynor@google.com>
Signed-off-by: Ambresh K <ambresh@ti.com>
[Ported to 3.0 and cleanup]
Signed-off-by: Avinash.H.M. <avinashhm@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Nicole Chalhoub <n-chalhoub@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/vc.h')
-rw-r--r-- | arch/arm/mach-omap2/vc.h | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h index fc042e4..139c04c 100644 --- a/arch/arm/mach-omap2/vc.h +++ b/arch/arm/mach-omap2/vc.h @@ -22,6 +22,22 @@ struct voltagedomain; /** + * struct setup_time_ramp_params - ramp time parameters + * @pre_scaler_to_sysclk_cycles: The array represents correlation of prescaler + * to the number of system clock cycles, for which rampdown counter is + * incremented or decremented in PRM_VOLTSETUP_XXX_RET_SLEEP registers. + * This is to handle variances in defined values due to conditions such + * as "Errata Id: i623: Retention/Sleep Voltage Transitions Ramp Time" + * @pre_scaler_to_sysclk_cycles_count: number of entries available + * + * Add parameters that allow us to compute the ramp time for the device + */ +struct setup_time_ramp_params { + u16 *pre_scaler_to_sysclk_cycles; + u8 pre_scaler_to_sysclk_cycles_count; +}; + +/** * struct omap_vc_common - per-VC register/bitfield data * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register @@ -38,6 +54,7 @@ struct voltagedomain; * @i2c_cfg_reg: I2C configuration register offset * @i2c_cfg_hsen_mask: high-speed mode bit field mask in I2C config register * @i2c_mcode_mask: MCODE field mask for I2C config register + * @setup_time_params: setup time parameters * * XXX One of cmd_on_mask and cmd_on_shift are not needed * XXX VALID should probably be a shift, not a mask @@ -60,6 +77,7 @@ struct omap_vc_common { u8 i2c_cfg_reg; u8 i2c_cfg_hsen_mask; u8 i2c_mcode_mask; + struct setup_time_ramp_params *setup_time_params; }; /** @@ -97,7 +115,7 @@ struct omap_vc_channel { u16 volt_reg_addr; u16 cmd_reg_addr; u8 cfg_channel; - u16 setup_time; + u32 setup_time; bool i2c_high_speed; /* register access data */ |