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| author | Ben Dooks <ben-linux@fluff.org> | 2008-10-21 14:06:41 +0100 |
|---|---|---|
| committer | Ben Dooks <ben-linux@fluff.org> | 2008-12-15 21:47:29 +0000 |
| commit | a5209797450a7c95a9b546d83dae163833f16437 (patch) | |
| tree | d012521167bcaee082aaf3ffd07d8239095ef473 /arch/arm/mach-s3c6400 | |
| parent | d521f87e9c642dbc820cb839039e25a05cb02151 (diff) | |
| download | kernel_samsung_tuna-a5209797450a7c95a9b546d83dae163833f16437.zip kernel_samsung_tuna-a5209797450a7c95a9b546d83dae163833f16437.tar.gz kernel_samsung_tuna-a5209797450a7c95a9b546d83dae163833f16437.tar.bz2 | |
[ARM] S3C64XX: Add <mach/entry-macro.S>
Add the include for the interrupt entry macros needed
to be included by <mach/entry-macro.S> for the kernel
interrupt handler.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/mach-s3c6400')
| -rw-r--r-- | arch/arm/mach-s3c6400/include/mach/entry-macro.S | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c6400/include/mach/entry-macro.S b/arch/arm/mach-s3c6400/include/mach/entry-macro.S new file mode 100644 index 0000000..fbd90d2 --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/entry-macro.S @@ -0,0 +1,44 @@ +/* arch/arm/mach-s3c6400/include/mach/entry-macro.S + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks <ben@simtec.co.uk> + * + * Low-level IRQ helper macros for the Samsung S3C64XX series + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. +*/ + +#include <asm/hardware/vic.h> +#include <mach/map.h> +#include <plat/irqs.h> + + .macro disable_fiq + .endm + + .macro get_irqnr_preamble, base, tmp + ldr \base, =S3C_VA_VIC0 + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + + @ check the vic0 + mov \irqnr, # S3C_IRQ_OFFSET + 31 + ldr \irqstat, [ \base, # VIC_IRQ_STATUS ] + teq \irqstat, #0 + + @ otherwise try vic1 + addeq \tmp, \base, #(S3C_VA_VIC1 - S3C_VA_VIC0) + addeq \irqnr, \irqnr, #32 + ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] + teqeq \irqstat, #0 + + clzne \irqstat, \irqstat + subne \irqnr, \irqnr, \irqstat + .endm |