aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mm/cache-v3.S
diff options
context:
space:
mode:
authorDmitry Torokhov <dmitry.torokhov@gmail.com>2010-01-21 23:55:25 -0800
committerDmitry Torokhov <dmitry.torokhov@gmail.com>2010-01-21 23:55:25 -0800
commit7755726fe90a8b253659756e6de68c1a55aa427f (patch)
treea3523fa77e07854db3b8089e3066a55ea997060c /arch/arm/mm/cache-v3.S
parent3bf127637e22ddf95e67e10a23c339cee3d52429 (diff)
parent92dcffb916d309aa01778bf8963a6932e4014d07 (diff)
downloadkernel_samsung_tuna-7755726fe90a8b253659756e6de68c1a55aa427f.zip
kernel_samsung_tuna-7755726fe90a8b253659756e6de68c1a55aa427f.tar.gz
kernel_samsung_tuna-7755726fe90a8b253659756e6de68c1a55aa427f.tar.bz2
Merge commit 'v2.6.33-rc5' into next
Diffstat (limited to 'arch/arm/mm/cache-v3.S')
-rw-r--r--arch/arm/mm/cache-v3.S9
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/arm/mm/cache-v3.S b/arch/arm/mm/cache-v3.S
index 8a4abeb..2a48273 100644
--- a/arch/arm/mm/cache-v3.S
+++ b/arch/arm/mm/cache-v3.S
@@ -72,14 +72,15 @@ ENTRY(v3_coherent_user_range)
mov pc, lr
/*
- * flush_kern_dcache_page(void *page)
+ * flush_kern_dcache_area(void *page, size_t size)
*
* Ensure no D cache aliasing occurs, either with itself or
* the I cache
*
- * - addr - page aligned address
+ * - addr - kernel address
+ * - size - region size
*/
-ENTRY(v3_flush_kern_dcache_page)
+ENTRY(v3_flush_kern_dcache_area)
/* FALLTHROUGH */
/*
@@ -129,7 +130,7 @@ ENTRY(v3_cache_fns)
.long v3_flush_user_cache_range
.long v3_coherent_kern_range
.long v3_coherent_user_range
- .long v3_flush_kern_dcache_page
+ .long v3_flush_kern_dcache_area
.long v3_dma_inv_range
.long v3_dma_clean_range
.long v3_dma_flush_range