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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-12-19 15:43:34 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-12-19 15:44:53 +0000 |
| commit | 40cc52440073903f3b7477a3391c4ca0761445d0 (patch) | |
| tree | 3f1f0cdf4180746acb32e3b1089b3a771fb8258c /arch/arm/plat-iop | |
| parent | 83cf1eecfe9afee99d6b86f963187acd414c019d (diff) | |
| download | kernel_samsung_tuna-40cc52440073903f3b7477a3391c4ca0761445d0.zip kernel_samsung_tuna-40cc52440073903f3b7477a3391c4ca0761445d0.tar.gz kernel_samsung_tuna-40cc52440073903f3b7477a3391c4ca0761445d0.tar.bz2 | |
ARM: clockevents: fix IOP clock events initialization
Ensure that no interrupt is pending before registering the clock
event device, and properly initialize the periodic tick in the
->set_mode callback.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/plat-iop')
| -rw-r--r-- | arch/arm/plat-iop/time.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c index 85d3e55..d615e6f 100644 --- a/arch/arm/plat-iop/time.c +++ b/arch/arm/plat-iop/time.c @@ -87,6 +87,7 @@ static void iop_set_mode(enum clock_event_mode mode, case CLOCK_EVT_MODE_PERIODIC: write_tmr0(tmr & ~IOP_TMR_EN); write_tcr0(ticks_per_jiffy - 1); + write_trr0(ticks_per_jiffy - 1); tmr |= (IOP_TMR_RELOAD | IOP_TMR_EN); break; case CLOCK_EVT_MODE_ONESHOT: @@ -152,6 +153,7 @@ void __init iop_init_time(unsigned long tick_rate) * Set up interrupting clockevent timer 0. */ write_tmr0(timer_ctl & ~IOP_TMR_EN); + write_tisr(1); setup_irq(IRQ_IOP_TIMER0, &iop_timer_irq); clockevents_calc_mult_shift(&iop_clockevent, tick_rate, IOP_MIN_RANGE); @@ -161,9 +163,6 @@ void __init iop_init_time(unsigned long tick_rate) clockevent_delta2ns(0xf, &iop_clockevent); iop_clockevent.cpumask = cpumask_of(0); clockevents_register_device(&iop_clockevent); - write_trr0(ticks_per_jiffy - 1); - write_tcr0(ticks_per_jiffy - 1); - write_tmr0(timer_ctl); /* * Set up free-running clocksource timer 1. |