diff options
| author | Ben Dooks <ben-linux@fluff.org> | 2009-03-25 11:01:24 +0000 |
|---|---|---|
| committer | Ben Dooks <ben-linux@fluff.org> | 2009-05-07 11:04:58 +0100 |
| commit | 4faf6867638cc21aa43b4ca4ed0bdf14a2d29762 (patch) | |
| tree | 1fed91079785469a6f044900bd322166df37adbf /arch/arm/plat-s3c64xx/setup-sdhci-gpio.c | |
| parent | e074f9803227236252c8e7be16d836d709abff57 (diff) | |
| download | kernel_samsung_tuna-4faf6867638cc21aa43b4ca4ed0bdf14a2d29762.zip kernel_samsung_tuna-4faf6867638cc21aa43b4ca4ed0bdf14a2d29762.tar.gz kernel_samsung_tuna-4faf6867638cc21aa43b4ca4ed0bdf14a2d29762.tar.bz2 | |
[ARM] S3C64XX: Add S3C6400 SDHCI setup support
Add support for S3C6400 SDHCI channels 0 and 1, making
the GPIO code common to both S3C6400 and S3C6410.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c64xx/setup-sdhci-gpio.c')
| -rw-r--r-- | arch/arm/plat-s3c64xx/setup-sdhci-gpio.c | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c b/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c new file mode 100644 index 0000000..5417123 --- /dev/null +++ b/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c @@ -0,0 +1,55 @@ +/* linux/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c + * + * Copyright 2008 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * http://armlinux.simtec.co.uk/ + * + * S3C64XX - Helper functions for setting up SDHCI device(s) GPIO (HSMMC) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/interrupt.h> +#include <linux/platform_device.h> +#include <linux/io.h> + +#include <mach/gpio.h> +#include <plat/gpio-cfg.h> + +void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) +{ + unsigned int gpio; + unsigned int end; + + end = S3C64XX_GPG(2 + width); + + /* Set all the necessary GPG pins to special-function 0 */ + for (gpio = S3C64XX_GPG(0); gpio < end; gpio++) { + s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + } + + s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); + s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(2)); +} + +void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) +{ + unsigned int gpio; + unsigned int end; + + end = S3C64XX_GPH(2 + width); + + /* Set all the necessary GPG pins to special-function 0 */ + for (gpio = S3C64XX_GPH(0); gpio < end; gpio++) { + s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); + s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + } + + s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); + s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3)); +} |