aboutsummaryrefslogtreecommitdiffstats
path: root/arch/blackfin/mach-bf527
diff options
context:
space:
mode:
authorSonic Zhang <sonic.zhang@analog.com>2009-04-07 16:52:26 +0100
committerLinus Torvalds <torvalds@linux-foundation.org>2009-04-07 08:44:05 -0700
commitd307d36adeaa70074773b3e5eab8d7e1beb008a4 (patch)
tree2a51257927be7c1a99ffb38b4752e0a4b56edc2a /arch/blackfin/mach-bf527
parent6f95570e407d03c5140a220e054f9b18abdc7041 (diff)
downloadkernel_samsung_tuna-d307d36adeaa70074773b3e5eab8d7e1beb008a4.zip
kernel_samsung_tuna-d307d36adeaa70074773b3e5eab8d7e1beb008a4.tar.gz
kernel_samsung_tuna-d307d36adeaa70074773b3e5eab8d7e1beb008a4.tar.bz2
tty: Blackin CTS/RTS
Both software emulated and hardware based CTS and RTS are enabled in serial driver. The CTS RTS PIN connection on BF548 UART port is defined as a modem device not as a host device. In order to test it under Linux, please nake a cross UART cable to exchange CTS and RTS signal. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/blackfin/mach-bf527')
-rw-r--r--arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h10
1 files changed, 7 insertions, 3 deletions
diff --git a/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h
index d2b160c..a625659 100644
--- a/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h
@@ -53,9 +53,9 @@
#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
-#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
-#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1)
-#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0)
+#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
+#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
+#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
@@ -87,6 +87,7 @@
struct bfin_serial_port {
struct uart_port port;
unsigned int old_status;
+ int status_irq;
unsigned int lsr;
#ifdef CONFIG_SERIAL_BFIN_DMA
int tx_done;
@@ -125,6 +126,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
struct bfin_serial_res {
unsigned long uart_base_addr;
int uart_irq;
+ int uart_status_irq;
#ifdef CONFIG_SERIAL_BFIN_DMA
unsigned int uart_tx_dma_channel;
unsigned int uart_rx_dma_channel;
@@ -140,6 +142,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
{
0xFFC00400,
IRQ_UART0_RX,
+ IRQ_UART0_ERROR,
#ifdef CONFIG_SERIAL_BFIN_DMA
CH_UART0_TX,
CH_UART0_RX,
@@ -154,6 +157,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
{
0xFFC02000,
IRQ_UART1_RX,
+ IRQ_UART1_ERROR,
#ifdef CONFIG_SERIAL_BFIN_DMA
CH_UART1_TX,
CH_UART1_RX,