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| author | Magnus Damm <magnus@valinux.co.jp> | 2006-09-26 10:52:36 +0200 |
|---|---|---|
| committer | Andi Kleen <andi@basil.nowhere.org> | 2006-09-26 10:52:36 +0200 |
| commit | e9dff0ee6694b2edd40b1b448cb786f6a7b02336 (patch) | |
| tree | 0192d9bfe88fb2b9652150f0437f34af86cc72ea /arch/i386/kernel/cpu | |
| parent | 5f0f1c166647860bb2c2a206338e7d9af3834753 (diff) | |
| download | kernel_samsung_tuna-e9dff0ee6694b2edd40b1b448cb786f6a7b02336.zip kernel_samsung_tuna-e9dff0ee6694b2edd40b1b448cb786f6a7b02336.tar.gz kernel_samsung_tuna-e9dff0ee6694b2edd40b1b448cb786f6a7b02336.tar.bz2 | |
[PATCH] i386: mark cpu cache functions as __cpuinit
Mark i386-specific cpu cache functions as __cpuinit. They are all
only called from arch/i386/common.c:display_cache_info() that already is
marked as __cpuinit.
Signed-off-by: Magnus Damm <magnus@valinux.co.jp>
Signed-off-by: Andi Kleen <ak@suse.de>
Diffstat (limited to 'arch/i386/kernel/cpu')
| -rw-r--r-- | arch/i386/kernel/cpu/amd.c | 2 | ||||
| -rw-r--r-- | arch/i386/kernel/cpu/centaur.c | 2 | ||||
| -rw-r--r-- | arch/i386/kernel/cpu/intel.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/arch/i386/kernel/cpu/amd.c b/arch/i386/kernel/cpu/amd.c index 856cd08..e475809 100644 --- a/arch/i386/kernel/cpu/amd.c +++ b/arch/i386/kernel/cpu/amd.c @@ -246,7 +246,7 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) num_cache_leaves = 3; } -static unsigned int amd_size_cache(struct cpuinfo_x86 * c, unsigned int size) +static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 * c, unsigned int size) { /* AMD errata T13 (order #21922) */ if ((c->x86 == 6)) { diff --git a/arch/i386/kernel/cpu/centaur.c b/arch/i386/kernel/cpu/centaur.c index 34a81ed..8c25047 100644 --- a/arch/i386/kernel/cpu/centaur.c +++ b/arch/i386/kernel/cpu/centaur.c @@ -442,7 +442,7 @@ static void __cpuinit init_centaur(struct cpuinfo_x86 *c) } } -static unsigned int centaur_size_cache(struct cpuinfo_x86 * c, unsigned int size) +static unsigned int __cpuinit centaur_size_cache(struct cpuinfo_x86 * c, unsigned int size) { /* VIA C3 CPUs (670-68F) need further shifting. */ if ((c->x86 == 6) && ((c->x86_model == 7) || (c->x86_model == 8))) diff --git a/arch/i386/kernel/cpu/intel.c b/arch/i386/kernel/cpu/intel.c index 26243e0..94a95aa 100644 --- a/arch/i386/kernel/cpu/intel.c +++ b/arch/i386/kernel/cpu/intel.c @@ -198,7 +198,7 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c) } -static unsigned int intel_size_cache(struct cpuinfo_x86 * c, unsigned int size) +static unsigned int __cpuinit intel_size_cache(struct cpuinfo_x86 * c, unsigned int size) { /* Intel PIII Tualatin. This comes in two flavours. * One has 256kb of cache, the other 512. We have no way |