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authorTrond Myklebust <Trond.Myklebust@netapp.com>2006-06-20 08:59:45 -0400
committerTrond Myklebust <Trond.Myklebust@netapp.com>2006-06-20 08:59:45 -0400
commitd59bf96cdde5b874a57bfd1425faa45da915d0b7 (patch)
tree351a40b72514d620e5bebea2de38c26f23277ffc /arch/mips/mips-boards/malta/malta_smp.c
parent28df955a2ad484d602314b30183ea8496a9aa34a (diff)
parent25f42b6af09e34c3f92107b36b5aa6edc2fdba2f (diff)
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Merge branch 'master' of /home/trondmy/kernel/linux-2.6/
Diffstat (limited to 'arch/mips/mips-boards/malta/malta_smp.c')
-rw-r--r--arch/mips/mips-boards/malta/malta_smp.c19
1 files changed, 0 insertions, 19 deletions
diff --git a/arch/mips/mips-boards/malta/malta_smp.c b/arch/mips/mips-boards/malta/malta_smp.c
index 6c6c8ee..cf96717 100644
--- a/arch/mips/mips-boards/malta/malta_smp.c
+++ b/arch/mips/mips-boards/malta/malta_smp.c
@@ -34,25 +34,6 @@ void core_send_ipi(int cpu, unsigned int action)
}
/*
- * Detect available CPUs/VPEs/TCs and populate phys_cpu_present_map
- */
-
-void __init prom_build_cpu_map(void)
-{
- int nextslot;
-
- /*
- * As of November, 2004, MIPSsim only simulates one core
- * at a time. However, that core may be a MIPS MT core
- * with multiple virtual processors and thread contexts.
- */
-
- if (read_c0_config3() & (1<<2)) {
- nextslot = mipsmt_build_cpu_map(1);
- }
-}
-
-/*
* Platform "CPU" startup hook
*/