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author | Jack Miller <jack@codezen.org> | 2011-04-14 22:32:08 +0000 |
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committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2011-05-06 13:32:41 +1000 |
commit | a0496d450ab8c17f6c4d86979b1f6ba486fe9365 (patch) | |
tree | accb4fa5d2695770a1c6992f7437df57e9f14868 /arch/powerpc/kernel/exceptions-64e.S | |
parent | a1d0d98daf6ce580d017a43b09fe30a375cde3e8 (diff) | |
download | kernel_samsung_tuna-a0496d450ab8c17f6c4d86979b1f6ba486fe9365.zip kernel_samsung_tuna-a0496d450ab8c17f6c4d86979b1f6ba486fe9365.tar.gz kernel_samsung_tuna-a0496d450ab8c17f6c4d86979b1f6ba486fe9365.tar.bz2 |
powerpc: Add early debug for WSP platforms
Signed-off-by: Jack Miller <jack@codezen.org>
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/exceptions-64e.S')
-rw-r--r-- | arch/powerpc/kernel/exceptions-64e.S | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S index c98e9d2..4d0abb4 100644 --- a/arch/powerpc/kernel/exceptions-64e.S +++ b/arch/powerpc/kernel/exceptions-64e.S @@ -17,6 +17,7 @@ #include <asm/cputable.h> #include <asm/setup.h> #include <asm/thread_info.h> +#include <asm/reg_a2.h> #include <asm/exception-64e.h> #include <asm/bug.h> #include <asm/irqflags.h> @@ -951,6 +952,22 @@ a2_tlbinit_after_linear_map: .globl a2_tlbinit_after_iprot_flush a2_tlbinit_after_iprot_flush: +#ifdef CONFIG_PPC_EARLY_DEBUG_WSP + /* Now establish early debug mappings if applicable */ + /* Restore the MAS0 we used for linear mapping load */ + mtspr SPRN_MAS0,r11 + + lis r3,(MAS1_VALID | MAS1_IPROT)@h + ori r3,r3,(BOOK3E_PAGESZ_4K << MAS1_TSIZE_SHIFT) + mtspr SPRN_MAS1,r3 + LOAD_REG_IMMEDIATE(r3, WSP_UART_VIRT | MAS2_I | MAS2_G) + mtspr SPRN_MAS2,r3 + LOAD_REG_IMMEDIATE(r3, WSP_UART_PHYS | MAS3_SR | MAS3_SW) + mtspr SPRN_MAS7_MAS3,r3 + /* re-use the MAS8 value from the linear mapping */ + tlbwe +#endif /* CONFIG_PPC_EARLY_DEBUG_WSP */ + PPC_TLBILX(0,0,0) sync isync |