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| author | Anton Vorontsov <avorontsov@ru.mvista.com> | 2008-05-23 20:38:56 +0400 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2008-06-10 10:39:13 -0500 |
| commit | 5e41486c408eb4206aee09303631427f57771691 (patch) | |
| tree | 04198c2fdffdb70816ba141aaa2f2b1d6d8e72aa /arch/powerpc/sysdev/qe_lib/ucc.c | |
| parent | 83ff9dcf375c418ca3b98eb950711525ca1269e2 (diff) | |
| download | kernel_samsung_tuna-5e41486c408eb4206aee09303631427f57771691.zip kernel_samsung_tuna-5e41486c408eb4206aee09303631427f57771691.tar.gz kernel_samsung_tuna-5e41486c408eb4206aee09303631427f57771691.tar.bz2 | |
powerpc/QE: add support for QE USB clocks routing
This patch adds a function to the qe_lib to setup QE USB clocks routing.
To setup clocks safely, cmxgcr register needs locking, so I just reused
ucc_lock since it was used only to protect cmxgcr.
The idea behind placing clocks routing functions into the qe_lib is that
later we'll hopefully switch to the generic Linux Clock API, thus, for
example, FHCI driver may be used for QE and CPM chips without nasty #ifdefs.
This patch also fixes QE_USB_RESTART_TX command definition in the qe.h.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-By: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/sysdev/qe_lib/ucc.c')
| -rw-r--r-- | arch/powerpc/sysdev/qe_lib/ucc.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/powerpc/sysdev/qe_lib/ucc.c b/arch/powerpc/sysdev/qe_lib/ucc.c index 0e348d9..d3c7f5a 100644 --- a/arch/powerpc/sysdev/qe_lib/ucc.c +++ b/arch/powerpc/sysdev/qe_lib/ucc.c @@ -26,7 +26,8 @@ #include <asm/qe.h> #include <asm/ucc.h> -static DEFINE_SPINLOCK(ucc_lock); +DEFINE_SPINLOCK(cmxgcr_lock); +EXPORT_SYMBOL(cmxgcr_lock); int ucc_set_qe_mux_mii_mng(unsigned int ucc_num) { @@ -35,10 +36,10 @@ int ucc_set_qe_mux_mii_mng(unsigned int ucc_num) if (ucc_num > UCC_MAX_NUM - 1) return -EINVAL; - spin_lock_irqsave(&ucc_lock, flags); + spin_lock_irqsave(&cmxgcr_lock, flags); clrsetbits_be32(&qe_immr->qmx.cmxgcr, QE_CMXGCR_MII_ENET_MNG, ucc_num << QE_CMXGCR_MII_ENET_MNG_SHIFT); - spin_unlock_irqrestore(&ucc_lock, flags); + spin_unlock_irqrestore(&cmxgcr_lock, flags); return 0; } |