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| author | Kumar Gala <galak@freescale.com> | 2005-06-25 14:54:37 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-06-25 16:24:26 -0700 |
| commit | 33d9e9b56d5ccd7776fdfe3ecce4a2793dee6fd3 (patch) | |
| tree | e2ecb071823cc9ffe2755ed117bfabe04a35e1fc /arch/ppc/mm | |
| parent | 62aa751d16399637325852bc0a1fcf13c2476dd7 (diff) | |
| download | kernel_samsung_tuna-33d9e9b56d5ccd7776fdfe3ecce4a2793dee6fd3.zip kernel_samsung_tuna-33d9e9b56d5ccd7776fdfe3ecce4a2793dee6fd3.tar.gz kernel_samsung_tuna-33d9e9b56d5ccd7776fdfe3ecce4a2793dee6fd3.tar.bz2 | |
[PATCH] ppc32: Add support for Freescale e200 (Book-E) core
The e200 core is a Book-E core (similar to e500) that has a unified L1 cache
and is not cache coherent on the bus. The e200 core also adds a separate
exception level for debug exceptions. Part of this patch helps to cleanup a
few cases that are true for all Freescale Book-E parts, not just e500.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc/mm')
| -rw-r--r-- | arch/ppc/mm/fsl_booke_mmu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/ppc/mm/fsl_booke_mmu.c b/arch/ppc/mm/fsl_booke_mmu.c index e07990e..9fa884d 100644 --- a/arch/ppc/mm/fsl_booke_mmu.c +++ b/arch/ppc/mm/fsl_booke_mmu.c @@ -126,7 +126,7 @@ void settlbcam(int index, unsigned long virt, phys_addr_t phys, flags |= _PAGE_COHERENT; #endif - TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index); + TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1); TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid); TLBCAM[index].MAS2 = virt & PAGE_MASK; |