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authorFrederic Weisbecker <fweisbec@gmail.com>2010-09-17 03:24:13 +0200
committerFrederic Weisbecker <fweisbec@gmail.com>2010-09-17 03:24:13 +0200
commit89e45aac42d40426c97e6901811309bf49c4993f (patch)
tree77d72204f3a92e9ecbc8b4e36d6e04fb6b17a98b /arch/x86/include/asm/hw_breakpoint.h
parent0d2b54904d8db26663117ab82697cae5cdf56f72 (diff)
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x86: Fix instruction breakpoint encoding
Lengths and types of breakpoints are encoded in a half byte into CPU registers. However when we extract these values and store them, we add a high half byte part to them: 0x40 to the length and 0x80 to the type. When that gets reloaded to the CPU registers, the high part is masked. While making the instruction breakpoints available for perf, I zapped that high part on instruction breakpoint encoding and that broke the arch -> generic translation used by ptrace instruction breakpoints. Writing dr7 to set an inst breakpoint was then failing. There is no apparent reason for these high parts so we could get rid of them altogether. That's an invasive change though so let's do that later and for now fix the problem by restoring that inst breakpoint high part encoding in this sole patch. Reported-by: Kelvie Wong <kelvie@ieee.org> Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com> Cc: Prasad <prasad@linux.vnet.ibm.com> Cc: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Cc: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/x86/include/asm/hw_breakpoint.h')
-rw-r--r--arch/x86/include/asm/hw_breakpoint.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/include/asm/hw_breakpoint.h b/arch/x86/include/asm/hw_breakpoint.h
index 528a11e..824ca07 100644
--- a/arch/x86/include/asm/hw_breakpoint.h
+++ b/arch/x86/include/asm/hw_breakpoint.h
@@ -20,7 +20,7 @@ struct arch_hw_breakpoint {
#include <linux/list.h>
/* Available HW breakpoint length encodings */
-#define X86_BREAKPOINT_LEN_X 0x00
+#define X86_BREAKPOINT_LEN_X 0x40
#define X86_BREAKPOINT_LEN_1 0x40
#define X86_BREAKPOINT_LEN_2 0x44
#define X86_BREAKPOINT_LEN_4 0x4c