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author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-05-17 15:17:10 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-05-17 15:17:10 -0700 |
commit | 29e92f483603d97dd1d2bafcb32101287dfac4ad (patch) | |
tree | 87c267216117bef6b1c5752c459643f91fc50b80 /arch | |
parent | 08c18964a247b412acab56599a643e6f73e1ec5a (diff) | |
parent | dfb0ae091479240c19bef4382026671776ca204e (diff) | |
download | kernel_samsung_tuna-29e92f483603d97dd1d2bafcb32101287dfac4ad.zip kernel_samsung_tuna-29e92f483603d97dd1d2bafcb32101287dfac4ad.tar.gz kernel_samsung_tuna-29e92f483603d97dd1d2bafcb32101287dfac4ad.tar.bz2 |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] pxa: spitz wants PXA27x UDC definitions
[ARM] pxa: fix pxafb build when cpufreq is enabled
[ARM] fix parenthesis in include/asm-arm/arch-omap/control.h
[ARM] colibri: fix support for DM9000 ethernet device
[ARM] arm/kernel/arthur.c: add MODULE_LICENSE
[ARM] 5037/1: Orion: fix DNS323/Kurobox Pro PCI initialisation
[ARM] 5034/1: fix arm{925,926,940,946} dma_flush_range() in WT mode
[ARM] export copy_page
[ARM] 5026/1: locomo: add .settype for gpio and several small fixes
ARM: OMAP: Fixed comments on global PRM register usage
ARM: OMAP: Add PARENT_CONTROLS_CLOCK flag to dpll5_m2_ck
ARM: OMAP: PRCM fixes to ssi clock handling
ARM: OMAP: Add fuctional clock enabler for iva2
ARM: OMAP: Fix 34xx to use correct shift values for gpio2-6 fclks
ARM: OMAP: Keymap fix for palmte and palmz71
ARM: OMAP: Fix Unbalanced enable for IRQ in omap mailbox
ARM: OMAP: DMA: Fix incorrect channel linking
ARM: OMAP: Warn on disabling clocks with no users
ARM: OMAP: Add calls to omap2_set_globals_*()
ARM: OMAP: Update MMC header to fix compile
Diffstat (limited to 'arch')
25 files changed, 108 insertions, 52 deletions
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c index ae21755..d973c98 100644 --- a/arch/arm/common/locomo.c +++ b/arch/arm/common/locomo.c @@ -321,11 +321,42 @@ static void locomo_gpio_unmask_irq(unsigned int irq) locomo_writel(r, mapbase + LOCOMO_GIE); } +static int GPIO_IRQ_rising_edge; +static int GPIO_IRQ_falling_edge; + +static int locomo_gpio_type(unsigned int irq, unsigned int type) +{ + unsigned int mask; + void __iomem *mapbase = get_irq_chip_data(irq); + + mask = 1 << (irq - LOCOMO_IRQ_GPIO_START); + + if (type == IRQT_PROBE) { + if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask) + return 0; + type = __IRQT_RISEDGE | __IRQT_FALEDGE; + } + + if (type & __IRQT_RISEDGE) + GPIO_IRQ_rising_edge |= mask; + else + GPIO_IRQ_rising_edge &= ~mask; + if (type & __IRQT_FALEDGE) + GPIO_IRQ_falling_edge |= mask; + else + GPIO_IRQ_falling_edge &= ~mask; + locomo_writel(GPIO_IRQ_rising_edge, mapbase + LOCOMO_GRIE); + locomo_writel(GPIO_IRQ_falling_edge, mapbase + LOCOMO_GFIE); + + return 0; +} + static struct irq_chip locomo_gpio_chip = { - .name = "LOCOMO-gpio", - .ack = locomo_gpio_ack_irq, - .mask = locomo_gpio_mask_irq, - .unmask = locomo_gpio_unmask_irq, + .name = "LOCOMO-gpio", + .ack = locomo_gpio_ack_irq, + .mask = locomo_gpio_mask_irq, + .unmask = locomo_gpio_unmask_irq, + .set_type = locomo_gpio_type, }; static void locomo_lt_handler(unsigned int irq, struct irq_desc *desc) @@ -450,22 +481,18 @@ static void locomo_setup_irq(struct locomo *lchip) set_irq_chip(IRQ_LOCOMO_KEY_BASE, &locomo_chip); set_irq_chip_data(IRQ_LOCOMO_KEY_BASE, irqbase); set_irq_chained_handler(IRQ_LOCOMO_KEY_BASE, locomo_key_handler); - set_irq_flags(IRQ_LOCOMO_KEY_BASE, IRQF_VALID | IRQF_PROBE); set_irq_chip(IRQ_LOCOMO_GPIO_BASE, &locomo_chip); set_irq_chip_data(IRQ_LOCOMO_GPIO_BASE, irqbase); set_irq_chained_handler(IRQ_LOCOMO_GPIO_BASE, locomo_gpio_handler); - set_irq_flags(IRQ_LOCOMO_GPIO_BASE, IRQF_VALID | IRQF_PROBE); set_irq_chip(IRQ_LOCOMO_LT_BASE, &locomo_chip); set_irq_chip_data(IRQ_LOCOMO_LT_BASE, irqbase); set_irq_chained_handler(IRQ_LOCOMO_LT_BASE, locomo_lt_handler); - set_irq_flags(IRQ_LOCOMO_LT_BASE, IRQF_VALID | IRQF_PROBE); set_irq_chip(IRQ_LOCOMO_SPI_BASE, &locomo_chip); set_irq_chip_data(IRQ_LOCOMO_SPI_BASE, irqbase); set_irq_chained_handler(IRQ_LOCOMO_SPI_BASE, locomo_spi_handler); - set_irq_flags(IRQ_LOCOMO_SPI_BASE, IRQF_VALID | IRQF_PROBE); /* install handlers for IRQ_LOCOMO_KEY_BASE generated interrupts */ set_irq_chip(LOCOMO_IRQ_KEY_START, &locomo_key_chip); @@ -488,7 +515,7 @@ static void locomo_setup_irq(struct locomo *lchip) set_irq_flags(LOCOMO_IRQ_LT_START, IRQF_VALID | IRQF_PROBE); /* install handlers for IRQ_LOCOMO_SPI_BASE generated interrupts */ - for (irq = LOCOMO_IRQ_SPI_START; irq < LOCOMO_IRQ_SPI_START + 3; irq++) { + for (irq = LOCOMO_IRQ_SPI_START; irq < LOCOMO_IRQ_SPI_START + 4; irq++) { set_irq_chip(irq, &locomo_spi_chip); set_irq_chip_data(irq, irqbase); set_irq_handler(irq, handle_edge_irq); @@ -574,20 +601,20 @@ static int locomo_suspend(struct platform_device *dev, pm_message_t state) save->LCM_GPO = locomo_readl(lchip->base + LOCOMO_GPO); /* GPIO */ locomo_writel(0x00, lchip->base + LOCOMO_GPO); - save->LCM_SPICT = locomo_readl(lchip->base + LOCOMO_SPICT); /* SPI */ + save->LCM_SPICT = locomo_readl(lchip->base + LOCOMO_SPI + LOCOMO_SPICT); /* SPI */ locomo_writel(0x40, lchip->base + LOCOMO_SPICT); save->LCM_GPE = locomo_readl(lchip->base + LOCOMO_GPE); /* GPIO */ locomo_writel(0x00, lchip->base + LOCOMO_GPE); save->LCM_ASD = locomo_readl(lchip->base + LOCOMO_ASD); /* ADSTART */ locomo_writel(0x00, lchip->base + LOCOMO_ASD); - save->LCM_SPIMD = locomo_readl(lchip->base + LOCOMO_SPIMD); /* SPI */ - locomo_writel(0x3C14, lchip->base + LOCOMO_SPIMD); + save->LCM_SPIMD = locomo_readl(lchip->base + LOCOMO_SPI + LOCOMO_SPIMD); /* SPI */ + locomo_writel(0x3C14, lchip->base + LOCOMO_SPI + LOCOMO_SPIMD); locomo_writel(0x00, lchip->base + LOCOMO_PAIF); locomo_writel(0x00, lchip->base + LOCOMO_DAC); locomo_writel(0x00, lchip->base + LOCOMO_BACKLIGHT + LOCOMO_TC); - if ( (locomo_readl(lchip->base + LOCOMO_LED + LOCOMO_LPT0) & 0x88) && (locomo_readl(lchip->base + LOCOMO_LED + LOCOMO_LPT1) & 0x88) ) + if ((locomo_readl(lchip->base + LOCOMO_LED + LOCOMO_LPT0) & 0x88) && (locomo_readl(lchip->base + LOCOMO_LED + LOCOMO_LPT1) & 0x88)) locomo_writel(0x00, lchip->base + LOCOMO_C32K); /* CLK32 off */ else /* 18MHz already enabled, so no wait */ @@ -616,10 +643,10 @@ static int locomo_resume(struct platform_device *dev) spin_lock_irqsave(&lchip->lock, flags); locomo_writel(save->LCM_GPO, lchip->base + LOCOMO_GPO); - locomo_writel(save->LCM_SPICT, lchip->base + LOCOMO_SPICT); + locomo_writel(save->LCM_SPICT, lchip->base + LOCOMO_SPI + LOCOMO_SPICT); locomo_writel(save->LCM_GPE, lchip->base + LOCOMO_GPE); locomo_writel(save->LCM_ASD, lchip->base + LOCOMO_ASD); - locomo_writel(save->LCM_SPIMD, lchip->base + LOCOMO_SPIMD); + locomo_writel(save->LCM_SPIMD, lchip->base + LOCOMO_SPI + LOCOMO_SPIMD); locomo_writel(0x00, lchip->base + LOCOMO_C32K); locomo_writel(0x90, lchip->base + LOCOMO_TADC); @@ -688,9 +715,9 @@ __locomo_probe(struct device *me, struct resource *mem, int irq) /* GPIO */ locomo_writel(0, lchip->base + LOCOMO_GPO); - locomo_writel( (LOCOMO_GPIO(2) | LOCOMO_GPIO(3) | LOCOMO_GPIO(13) | LOCOMO_GPIO(14)) + locomo_writel((LOCOMO_GPIO(1) | LOCOMO_GPIO(2) | LOCOMO_GPIO(13) | LOCOMO_GPIO(14)) , lchip->base + LOCOMO_GPE); - locomo_writel( (LOCOMO_GPIO(2) | LOCOMO_GPIO(3) | LOCOMO_GPIO(13) | LOCOMO_GPIO(14)) + locomo_writel((LOCOMO_GPIO(1) | LOCOMO_GPIO(2) | LOCOMO_GPIO(13) | LOCOMO_GPIO(14)) , lchip->base + LOCOMO_GPD); locomo_writel(0, lchip->base + LOCOMO_GIE); @@ -833,7 +860,10 @@ void locomo_gpio_set_dir(struct device *dev, unsigned int bits, unsigned int dir spin_lock_irqsave(&lchip->lock, flags); r = locomo_readl(lchip->base + LOCOMO_GPD); - r &= ~bits; + if (dir) + r |= bits; + else + r &= ~bits; locomo_writel(r, lchip->base + LOCOMO_GPD); r = locomo_readl(lchip->base + LOCOMO_GPE); diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c index f73d62e..688b7b1 100644 --- a/arch/arm/kernel/armksyms.c +++ b/arch/arm/kernel/armksyms.c @@ -179,3 +179,5 @@ EXPORT_SYMBOL(_find_next_zero_bit_be); EXPORT_SYMBOL(_find_first_bit_be); EXPORT_SYMBOL(_find_next_bit_be); #endif + +EXPORT_SYMBOL(copy_page); diff --git a/arch/arm/kernel/arthur.c b/arch/arm/kernel/arthur.c index 0ee2e98..321c529 100644 --- a/arch/arm/kernel/arthur.c +++ b/arch/arm/kernel/arthur.c @@ -90,3 +90,5 @@ static void __exit arthur_exit(void) module_init(arthur_init); module_exit(arthur_exit); + +MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index ca1a4bf..a0b16a7 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c @@ -63,7 +63,7 @@ static const int palmte_keymap[] = { KEY(1, 1, KEY_DOWN), KEY(1, 2, KEY_UP), KEY(1, 3, KEY_RIGHT), - KEY(1, 4, KEY_CENTER), + KEY(1, 4, KEY_ENTER), 0, }; diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index 1565107..e020c27 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c @@ -65,7 +65,7 @@ static int palmz71_keymap[] = { KEY(1, 1, KEY_DOWN), KEY(1, 2, KEY_UP), KEY(1, 3, KEY_RIGHT), - KEY(1, 4, KEY_CENTER), + KEY(1, 4, KEY_ENTER), KEY(2, 0, KEY_CAMERA), 0, }; diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index 1c12d7c..1682eb7 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c @@ -208,6 +208,7 @@ static void __init omap_2430sdp_init(void) static void __init omap_2430sdp_map_io(void) { + omap2_set_globals_243x(); omap2_map_common_io(); } diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index a1e1e67..620fa0f 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c @@ -394,6 +394,7 @@ static void __init omap_apollon_init(void) static void __init omap_apollon_map_io(void) { + omap2_set_globals_242x(); omap2_map_common_io(); } diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 9093815..df8be08 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -65,6 +65,7 @@ static void __init omap_generic_init(void) static void __init omap_generic_map_io(void) { + omap2_set_globals_242x(); /* should be 242x, 243x, or 343x */ omap2_map_common_io(); } diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index d1915f9..0d28f68 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c @@ -420,6 +420,7 @@ static void __init omap_h4_init(void) static void __init omap_h4_map_io(void) { + omap2_set_globals_242x(); omap2_map_common_io(); } diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index b57ffb5..ab9fc57 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -205,7 +205,9 @@ static void omap2_clk_wait_ready(struct clk *clk) /* REVISIT: What are the appropriate exclusions for 34XX? */ /* OMAP3: ignore DSS-mod clocks */ if (cpu_is_omap34xx() && - (((u32)reg & ~0xff) == (u32)OMAP_CM_REGADDR(OMAP3430_DSS_MOD, 0))) + (((u32)reg & ~0xff) == (u32)OMAP_CM_REGADDR(OMAP3430_DSS_MOD, 0) || + ((((u32)reg & ~0xff) == (u32)OMAP_CM_REGADDR(CORE_MOD, 0)) && + clk->enable_bit == OMAP3430_EN_SSI_SHIFT))) return; /* Check if both functional and interface clocks diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index cf4644a..c9c5972 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h @@ -836,7 +836,8 @@ static struct clk dpll5_m2_ck = { .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_CLKSEL5), .clksel_mask = OMAP3430ES2_DIV_120M_MASK, .clksel = div16_dpll5_clksel, - .flags = CLOCK_IN_OMAP3430ES2 | RATE_PROPAGATES, + .flags = CLOCK_IN_OMAP3430ES2 | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &omap2_clksel_recalc, }; @@ -1046,12 +1047,13 @@ static struct clk iva2_ck = { .name = "iva2_ck", .parent = &dpll2_m2_ck, .init = &omap2_init_clksel_parent, + .enable_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, CM_FCLKEN), + .enable_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_IDLEST_PLL), .clksel_mask = OMAP3430_ST_IVA2_CLK_MASK, .clksel = iva2_clksel, - .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | - PARENT_CONTROLS_CLOCK, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, .recalc = &omap2_clksel_recalc, }; @@ -1836,7 +1838,8 @@ static struct clk omapctrl_ick = { static struct clk ssi_l4_ick = { .name = "ssi_l4_ick", .parent = &l4_ick, - .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &followparent_recalc, }; @@ -2344,7 +2347,7 @@ static struct clk gpio6_fck = { .name = "gpio6_fck", .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), - .enable_bit = OMAP3430_EN_GPT6_SHIFT, + .enable_bit = OMAP3430_EN_GPIO6_SHIFT, .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; @@ -2353,7 +2356,7 @@ static struct clk gpio5_fck = { .name = "gpio5_fck", .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), - .enable_bit = OMAP3430_EN_GPT5_SHIFT, + .enable_bit = OMAP3430_EN_GPIO5_SHIFT, .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; @@ -2362,7 +2365,7 @@ static struct clk gpio4_fck = { .name = "gpio4_fck", .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), - .enable_bit = OMAP3430_EN_GPT4_SHIFT, + .enable_bit = OMAP3430_EN_GPIO4_SHIFT, .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; @@ -2371,7 +2374,7 @@ static struct clk gpio3_fck = { .name = "gpio3_fck", .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), - .enable_bit = OMAP3430_EN_GPT3_SHIFT, + .enable_bit = OMAP3430_EN_GPIO3_SHIFT, .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; @@ -2380,7 +2383,7 @@ static struct clk gpio2_fck = { .name = "gpio2_fck", .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), - .enable_bit = OMAP3430_EN_GPT2_SHIFT, + .enable_bit = OMAP3430_EN_GPIO2_SHIFT, .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h index 9249129..3c38395 100644 --- a/arch/arm/mach-omap2/cm-regbits-34xx.h +++ b/arch/arm/mach-omap2/cm-regbits-34xx.h @@ -56,6 +56,7 @@ /* CM_FCLKEN_IVA2 */ #define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2 (1 << 0) +#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT 0 /* CM_CLKEN_PLL_IVA2 */ #define OMAP3430_IVA2_DPLL_RAMPTIME_SHIFT 8 diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c index b03cd06..4799561 100644 --- a/arch/arm/mach-omap2/mailbox.c +++ b/arch/arm/mach-omap2/mailbox.c @@ -70,6 +70,9 @@ struct omap_mbox2_priv { static struct clk *mbox_ick_handle; +static void omap2_mbox_enable_irq(struct omap_mbox *mbox, + omap_mbox_type_t irq); + static inline unsigned int mbox_read_reg(unsigned int reg) { return __raw_readl(mbox_base + reg); @@ -81,7 +84,7 @@ static inline void mbox_write_reg(unsigned int val, unsigned int reg) } /* Mailbox H/W preparations */ -static inline int omap2_mbox_startup(struct omap_mbox *mbox) +static int omap2_mbox_startup(struct omap_mbox *mbox) { unsigned int l; @@ -97,38 +100,40 @@ static inline int omap2_mbox_startup(struct omap_mbox *mbox) l |= 0x00000011; mbox_write_reg(l, MAILBOX_SYSCONFIG); + omap2_mbox_enable_irq(mbox, IRQ_RX); + return 0; } -static inline void omap2_mbox_shutdown(struct omap_mbox *mbox) +static void omap2_mbox_shutdown(struct omap_mbox *mbox) { clk_disable(mbox_ick_handle); clk_put(mbox_ick_handle); } /* Mailbox FIFO handle functions */ -static inline mbox_msg_t omap2_mbox_fifo_read(struct omap_mbox *mbox) +static mbox_msg_t omap2_mbox_fifo_read(struct omap_mbox *mbox) { struct omap_mbox2_fifo *fifo = &((struct omap_mbox2_priv *)mbox->priv)->rx_fifo; return (mbox_msg_t) mbox_read_reg(fifo->msg); } -static inline void omap2_mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg) +static void omap2_mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg) { struct omap_mbox2_fifo *fifo = &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo; mbox_write_reg(msg, fifo->msg); } -static inline int omap2_mbox_fifo_empty(struct omap_mbox *mbox) +static int omap2_mbox_fifo_empty(struct omap_mbox *mbox) { struct omap_mbox2_fifo *fifo = &((struct omap_mbox2_priv *)mbox->priv)->rx_fifo; return (mbox_read_reg(fifo->msg_stat) == 0); } -static inline int omap2_mbox_fifo_full(struct omap_mbox *mbox) +static int omap2_mbox_fifo_full(struct omap_mbox *mbox) { struct omap_mbox2_fifo *fifo = &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo; @@ -136,7 +141,7 @@ static inline int omap2_mbox_fifo_full(struct omap_mbox *mbox) } /* Mailbox IRQ handle functions */ -static inline void omap2_mbox_enable_irq(struct omap_mbox *mbox, +static void omap2_mbox_enable_irq(struct omap_mbox *mbox, omap_mbox_type_t irq) { struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; @@ -147,7 +152,7 @@ static inline void omap2_mbox_enable_irq(struct omap_mbox *mbox, mbox_write_reg(l, p->irqenable); } -static inline void omap2_mbox_disable_irq(struct omap_mbox *mbox, +static void omap2_mbox_disable_irq(struct omap_mbox *mbox, omap_mbox_type_t irq) { struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; @@ -158,7 +163,7 @@ static inline void omap2_mbox_disable_irq(struct omap_mbox *mbox, mbox_write_reg(l, p->irqenable); } -static inline void omap2_mbox_ack_irq(struct omap_mbox *mbox, +static void omap2_mbox_ack_irq(struct omap_mbox *mbox, omap_mbox_type_t irq) { struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; @@ -167,7 +172,7 @@ static inline void omap2_mbox_ack_irq(struct omap_mbox *mbox, mbox_write_reg(bit, p->irqstatus); } -static inline int omap2_mbox_is_irq(struct omap_mbox *mbox, +static int omap2_mbox_is_irq(struct omap_mbox *mbox, omap_mbox_type_t irq) { struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index ab7649a..618f811 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -30,7 +30,7 @@ /* * Architecture-specific global PRM registers - * Use prm_{read,write}_reg() with these registers. + * Use __raw_{read,write}l() with these registers. * * With a few exceptions, these are the register names beginning with * PRCM_* on 24xx, and PRM_* on 34xx. (The exceptions are the diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c index f9430f5..27ce967 100644 --- a/arch/arm/mach-orion5x/dns323-setup.c +++ b/arch/arm/mach-orion5x/dns323-setup.c @@ -58,7 +58,7 @@ static int __init dns323_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) } static struct hw_pci dns323_pci __initdata = { - .nr_controllers = 1, + .nr_controllers = 2, .swizzle = pci_std_swizzle, .setup = orion5x_pci_sys_setup, .scan = orion5x_pci_sys_scan_bus, diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c index 8841086..f5074b8 100644 --- a/arch/arm/mach-orion5x/kurobox_pro-setup.c +++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c @@ -138,7 +138,7 @@ static int __init kurobox_pro_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) } static struct hw_pci kurobox_pro_pci __initdata = { - .nr_controllers = 1, + .nr_controllers = 2, .swizzle = pci_std_swizzle, .setup = orion5x_pci_sys_setup, .scan = orion5x_pci_sys_scan_bus, diff --git a/arch/arm/mach-pxa/colibri.c b/arch/arm/mach-pxa/colibri.c index 43bf5a1..574839d 100644 --- a/arch/arm/mach-pxa/colibri.c +++ b/arch/arm/mach-pxa/colibri.c @@ -98,7 +98,7 @@ static struct resource dm9000_resources[] = { [2] = { .start = COLIBRI_ETH_IRQ, .end = COLIBRI_ETH_IRQ, - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING, }, }; @@ -119,7 +119,6 @@ static void __init colibri_init(void) /* DM9000 LAN */ pxa_gpio_mode(GPIO78_nCS_2_MD); pxa_gpio_mode(GPIO_DM9000 | GPIO_IN); - set_irq_type(COLIBRI_ETH_IRQ, IRQT_FALLING); platform_add_devices(colibri_devices, ARRAY_SIZE(colibri_devices)); } diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index e7d0fcd..dace382 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -38,6 +38,7 @@ #include <asm/arch/pxa-regs.h> #include <asm/arch/pxa2xx-regs.h> #include <asm/arch/pxa2xx-gpio.h> +#include <asm/arch/pxa27x-udc.h> #include <asm/arch/irda.h> #include <asm/arch/mmc.h> #include <asm/arch/ohci.h> diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S index 065087a..d045812 100644 --- a/arch/arm/mm/proc-arm925.S +++ b/arch/arm/mm/proc-arm925.S @@ -332,7 +332,7 @@ ENTRY(arm925_dma_flush_range) #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry #else - mcr p15, 0, r0, c7, c10, 1 @ clean D entry + mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry #endif add r0, r0, #CACHE_DLINESIZE cmp r0, r1 diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S index 997db84..4cd3316 100644 --- a/arch/arm/mm/proc-arm926.S +++ b/arch/arm/mm/proc-arm926.S @@ -295,7 +295,7 @@ ENTRY(arm926_dma_flush_range) #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry #else - mcr p15, 0, r0, c7, c10, 1 @ clean D entry + mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry #endif add r0, r0, #CACHE_DLINESIZE cmp r0, r1 diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S index 44ead90..1a3d63d 100644 --- a/arch/arm/mm/proc-arm940.S +++ b/arch/arm/mm/proc-arm940.S @@ -222,7 +222,7 @@ ENTRY(arm940_dma_flush_range) #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH mcr p15, 0, r3, c7, c14, 2 @ clean/flush D entry #else - mcr p15, 0, r3, c7, c10, 2 @ clean D entry + mcr p15, 0, r3, c7, c6, 2 @ invalidate D entry #endif subs r3, r3, #1 << 26 bcs 2b @ entries 63 to 0 diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S index 2218b0c..82d579a 100644 --- a/arch/arm/mm/proc-arm946.S +++ b/arch/arm/mm/proc-arm946.S @@ -265,7 +265,7 @@ ENTRY(arm946_dma_flush_range) #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry #else - mcr p15, 0, r0, c7, c10, 1 @ clean D entry + mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry #endif add r0, r0, #CACHE_DLINESIZE cmp r0, r1 diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c index 72d34a2..2946c19 100644 --- a/arch/arm/plat-omap/clock.c +++ b/arch/arm/plat-omap/clock.c @@ -134,9 +134,17 @@ void clk_disable(struct clk *clk) return; spin_lock_irqsave(&clockfw_lock, flags); - BUG_ON(clk->usecount == 0); + if (clk->usecount == 0) { + printk(KERN_ERR "Trying disable clock %s with 0 usecount\n", + clk->name); + WARN_ON(1); + goto out; + } + if (arch_clock->clk_disable) arch_clock->clk_disable(clk); + +out: spin_unlock_irqrestore(&clockfw_lock, flags); } EXPORT_SYMBOL(clk_disable); diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 7937406..c00eda5 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -604,6 +604,7 @@ int omap_request_dma(int dev_id, const char *dev_name, chan->data = data; #ifndef CONFIG_ARCH_OMAP1 chan->chain_id = -1; + chan->next_linked_ch = -1; #endif chan->enabled_irqs = OMAP_DMA_DROP_IRQ | OMAP_DMA_BLOCK_IRQ; @@ -1087,7 +1088,6 @@ int omap_request_dma_chain(int dev_id, const char *dev_name, printk(KERN_ERR "omap_dma: Request failed %d\n", err); return err; } - dma_chan[channels[i]].next_linked_ch = -1; dma_chan[channels[i]].prev_linked_ch = -1; dma_chan[channels[i]].state = DMA_CH_NOTSTARTED; diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c index 1945ddf..6f33f58 100644 --- a/arch/arm/plat-omap/mailbox.c +++ b/arch/arm/plat-omap/mailbox.c @@ -355,7 +355,6 @@ static int omap_mbox_init(struct omap_mbox *mbox) "failed to register mailbox interrupt:%d\n", ret); goto fail_request_irq; } - enable_mbox_irq(mbox, IRQ_RX); mq = mbox_queue_alloc(mbox, mbox_txq_fn, mbox_tx_work); if (!mq) { |