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authorColin Cross <ccross@android.com>2011-10-17 18:47:19 -0700
committerColin Cross <ccross@android.com>2011-10-17 18:47:19 -0700
commit93334df4a1c839efb0ea31ae3baf1c7e6b56e80f (patch)
treef3378ffcc200fd87091a38cfd9b902d3d67323db /arch
parent538081533cd0bf0493a639d9072e8c494efbed39 (diff)
parent92f0b3028d9e9b94a54968303e09ae3b33e4ad1e (diff)
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Merge branch 'linux-omap-3.0' into android-omap-3.0
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap2/include/mach/omap4-common.h1
-rw-r--r--arch/arm/mach-omap2/omap-smp.c4
-rw-r--r--arch/arm/mach-omap2/omap4-mpuss-lowpower.c15
3 files changed, 16 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/include/mach/omap4-common.h b/arch/arm/mach-omap2/include/mach/omap4-common.h
index 0489ebe..f37cf4e 100644
--- a/arch/arm/mach-omap2/include/mach/omap4-common.h
+++ b/arch/arm/mach-omap2/include/mach/omap4-common.h
@@ -25,6 +25,7 @@
/*
* Secure HAL, PPA services available
*/
+#define PPA_SERVICE_0 0x21
#define PPA_SERVICE_PL310_POR 0x23
#define PPA_SERVICE_DEFAULT_POR_NS_SMP 0x25
/*
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 4fbb782..40e425a 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -45,7 +45,9 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
{
/* Enable NS access to SMP bit for this CPU on HS devices */
if (cpu_is_omap443x() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
- omap4_secure_dispatcher(PPA_SERVICE_DEFAULT_POR_NS_SMP, 4, 0, 0, 0, 0, 0);
+ omap4_secure_dispatcher(PPA_SERVICE_DEFAULT_POR_NS_SMP,
+ FLAG_START_CRITICAL,
+ 0, 0, 0, 0, 0);
/*
* If any interrupts are already enabled for the primary
diff --git a/arch/arm/mach-omap2/omap4-mpuss-lowpower.c b/arch/arm/mach-omap2/omap4-mpuss-lowpower.c
index c4855d9..a635a0a 100644
--- a/arch/arm/mach-omap2/omap4-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap4-mpuss-lowpower.c
@@ -621,11 +621,20 @@ cpu_prepare:
/* Enable GIC distributor and inteface on CPU0*/
gic_cpu_enable();
gic_dist_enable();
+
+ /*
+ * Dummy dispatcher call after OSWR and OFF
+ * Restore the right return Kernel address (with MMU on) for
+ * subsequent calls to secure ROM. Otherwise the return address
+ * will be to a PA return address and the system will hang.
+ */
+ if (omap_type() != OMAP2_DEVICE_TYPE_GP)
+ omap4_secure_dispatcher(PPA_SERVICE_0,
+ FLAG_START_CRITICAL,
+ 0, 0, 0, 0, 0);
}
- if ((omap4_device_prev_state_off()) &&
- (omap_type() != OMAP2_DEVICE_TYPE_GP)) {
- omap4_secure_dispatcher(0x21, 4, 0, 0, 0, 0, 0);
+ if (omap4_device_prev_state_off()) {
restore_ivahd_tesla_regs();
restore_l3instr_regs();
}