OMAP4430/60: EMIF: errata: Prohibit usage of Power-Down mode

A ZQ calibration long command is issued every time on exit
from active power-down and precharge power-down modes
when EMIF is configured to use Power-down mode
(EMIF_PWR_MGMT_CTRL.REG_LP_MODE=0x4).

Due to very short periods of power-down cycles, ZQ calibration
overhead creates bandwidth issues and increases overall system
power consumption.

As result, the guideline is to not allow Power-down mode and,
therefore, to not have set the
EMIF_PWR_MGMT_CTRL[10:8] REG_LP_MODE bit field to 0x4.

TI Errata i743; IMPACTED: OMAP4430/60 all revisions

Change-Id: Ib82f28e6e0c6c046ea277b90a78dc82c1ee82417
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Vitaly Chernooky <vitaly.chernooky@ti.com>

1 files changed, 38 insertions, 0 deletions

diff --git a/arch/arm/mach-omap2/emif.c b/arch/arm/mach-omap2/emif.c
index 9733f5d..3a821dc 100755
--- a/arch/arm/mach-omap2/emif.c
+++ b/arch/arm/mach-omap2/emif.c
@@ -87,6 +87,30 @@ void emif_dump(int emif_nr)
 #define EMIF_ERRATUM_SR_TIMER_i735	BIT(0)
 #define EMIF_ERRATUM_SR_TIMER_MIN	6
 
+/*
+ * TI Errata i743 - LPDDR2 Power-Down State is Not Efficient
+ * IMPACTED: OMAP4430 and OMAP4460 all revisions
+ * The EMIF supports power-down state for low power. The EMIF automatically
+ * puts the SDRAM into power-down after the memory is not accessed for a
+ * defined number of cycles and the EMIF_PWR_MGMT_CTRL[10:8] REG_LP_MODE bit
+ * field is set to 0x4.
+ * As the EMIF supports automatic output impedance calibration, a ZQ
+ * calibration long command is issued every time it exits active power-down
+ * and precharge power-down modes. The EMIF waits and blocks any other command
+ * during this calibration.
+ * The EMIF does not allow selective disabling of ZQ calibration upon exit of
+ * power-down mode. Due to very short periods of power-down cycles,
+ * ZQ calibration overhead creates bandwidth issues and increases overall
+ * system power consumption. On the other hand, issuing ZQ calibration
+ * long commands when exiting self-refresh is still required.
+ *
+ * W/A: Because there is no power consumption benefit of the power-down due to
+ * the calibration and there is a performance risk, the guideline is to not
+ * allow power-down state and, therefore, to not have set the
+ * EMIF_PWR_MGMT_CTRL[10:8] REG_LP_MODE bit field to 0x4.
+ */
+#define EMIF_ERRATUM_POWER_DOWN_NOT_EFFICIENT_i743	BIT(1)
+
 static u32 emif_errata;
 #define is_emif_erratum(erratum) (emif_errata & EMIF_ERRATUM_##erratum)
 
@@ -492,6 +516,17 @@ static void set_lp_mode(u32 emif_nr, u32 lpmode)
 	u32 temp;
 	void __iomem *base = emif[emif_nr].base;
 
+	if (is_emif_erratum(POWER_DOWN_NOT_EFFICIENT_i743) &&
+		(LP_MODE_PWR_DN == lpmode)) {
+
+		WARN_ONCE(1, "%s: Power-down mode"
+			" REG_LP_MODE = LP_MODE_PWR_DN(0x4) is prohibited by "
+			" erratum i743 switch to LP_MODE_SELF_REFRESH(0x2)",
+			__func__);
+		/* rallback LP_MODE to Self-refresh mode */
+		lpmode = LP_MODE_SELF_REFRESH;
+	}
+
 	/* Extract current lp mode value */
 	temp = readl(base + OMAP44XX_EMIF_PWR_MGMT_CTRL);
 
@@ -1095,6 +1130,9 @@ static void __init emif_setup_errata(void)
 {
 	if (cpu_is_omap44xx())
 		emif_errata |= EMIF_ERRATUM_SR_TIMER_i735;
+
+	if (cpu_is_omap443x() || cpu_is_omap446x())
+		emif_errata |= EMIF_ERRATUM_POWER_DOWN_NOT_EFFICIENT_i743;
 }
 
 /*