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| author | Stephen M. Cameron <scameron@beardog.cce.hp.com> | 2010-07-19 13:46:12 -0500 |
|---|---|---|
| committer | Jens Axboe <jaxboe@fusionio.com> | 2010-08-07 18:52:12 +0200 |
| commit | 8e93bf6d6c9c6d864c17b7743f2cc5f2e052fe46 (patch) | |
| tree | 71352d0d1f28ddd82fecc5e1684276c6e2602ab6 /drivers/block | |
| parent | b993313540de341e4c4df8f529d585e9400f43bd (diff) | |
| download | kernel_samsung_tuna-8e93bf6d6c9c6d864c17b7743f2cc5f2e052fe46.zip kernel_samsung_tuna-8e93bf6d6c9c6d864c17b7743f2cc5f2e052fe46.tar.gz kernel_samsung_tuna-8e93bf6d6c9c6d864c17b7743f2cc5f2e052fe46.tar.bz2 | |
cciss: factor out cciss_find_cfg_addrs.
Rationale for this is that I will also need to use this code
in fixing kdump host reset code prior to having the hba structure.
Signed-off-by: Stephen M. Cameron <scameron@beardog.cce.hp.com>
Signed-off-by: Jens Axboe <jaxboe@fusionio.com>
Diffstat (limited to 'drivers/block')
| -rw-r--r-- | drivers/block/cciss.c | 35 |
1 files changed, 23 insertions, 12 deletions
diff --git a/drivers/block/cciss.c b/drivers/block/cciss.c index 17e420c..3cd8397 100644 --- a/drivers/block/cciss.c +++ b/drivers/block/cciss.c @@ -4064,29 +4064,40 @@ static int __devinit cciss_wait_for_board_ready(ctlr_info_t *h) return -ENODEV; } +static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev, + void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index, + u64 *cfg_offset) +{ + *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); + *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); + *cfg_base_addr &= (u32) 0x0000ffff; + *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); + if (*cfg_base_addr_index == -1) { + dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, " + "*cfg_base_addr = 0x%08x\n", *cfg_base_addr); + return -ENODEV; + } + return 0; +} + static int __devinit cciss_find_cfgtables(ctlr_info_t *h) { u64 cfg_offset; u32 cfg_base_addr; u64 cfg_base_addr_index; u32 trans_offset; + int rc; - /* get the address index number */ - cfg_base_addr = readl(h->vaddr + SA5_CTCFG_OFFSET); - cfg_base_addr &= (u32) 0x0000ffff; - cfg_base_addr_index = find_PCI_BAR_index(h->pdev, cfg_base_addr); - if (cfg_base_addr_index == -1) { - dev_warn(&h->pdev->dev, "cannot find cfg_base_addr_index\n"); - return -ENODEV; - } - cfg_offset = readl(h->vaddr + SA5_CTMEM_OFFSET); + rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, + &cfg_base_addr_index, &cfg_offset); + if (rc) + return rc; h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, - cfg_base_addr_index) + cfg_offset, - sizeof(h->cfgtable)); + cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable)); if (!h->cfgtable) return -ENOMEM; /* Find performant mode table. */ - trans_offset = readl(&(h->cfgtable->TransMethodOffset)); + trans_offset = readl(&h->cfgtable->TransMethodOffset); h->transtable = remap_pci_mem(pci_resource_start(h->pdev, cfg_base_addr_index)+cfg_offset+trans_offset, sizeof(*h->transtable)); |