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| author | Rabin Vincent <rabin.vincent@stericsson.com> | 2011-01-25 11:18:24 +0100 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2011-01-30 22:27:19 -0800 |
| commit | 1c4b0927feab41346b0be971e0287aaf46eba8e0 (patch) | |
| tree | cae12aed8e600fa0fe70b54f34f31b3c8a0b9496 /drivers/dma/ste_dma40.c | |
| parent | cade1d30b2e071a687011c2a38c03ed7187ec501 (diff) | |
| download | kernel_samsung_tuna-1c4b0927feab41346b0be971e0287aaf46eba8e0.zip kernel_samsung_tuna-1c4b0927feab41346b0be971e0287aaf46eba8e0.tar.gz kernel_samsung_tuna-1c4b0927feab41346b0be971e0287aaf46eba8e0.tar.bz2 | |
dma40: move lli_load to main source file
These register writes are better placed in the main source file rather than
ll.c.
Acked-by: Per Forlin <per.forlin@stericsson.com>
Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/dma/ste_dma40.c')
| -rw-r--r-- | drivers/dma/ste_dma40.c | 22 |
1 files changed, 18 insertions, 4 deletions
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index 4e9d6c5..6a7a00d 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -504,15 +504,29 @@ static void d40_desc_submit(struct d40_chan *d40c, struct d40_desc *desc) list_add_tail(&desc->node, &d40c->active); } +static void d40_phy_lli_load(struct d40_chan *chan, struct d40_desc *desc) +{ + struct d40_phy_lli *lli_dst = desc->lli_phy.dst; + struct d40_phy_lli *lli_src = desc->lli_phy.src; + void __iomem *base = chan_base(chan); + + writel(lli_src->reg_cfg, base + D40_CHAN_REG_SSCFG); + writel(lli_src->reg_elt, base + D40_CHAN_REG_SSELT); + writel(lli_src->reg_ptr, base + D40_CHAN_REG_SSPTR); + writel(lli_src->reg_lnk, base + D40_CHAN_REG_SSLNK); + + writel(lli_dst->reg_cfg, base + D40_CHAN_REG_SDCFG); + writel(lli_dst->reg_elt, base + D40_CHAN_REG_SDELT); + writel(lli_dst->reg_ptr, base + D40_CHAN_REG_SDPTR); + writel(lli_dst->reg_lnk, base + D40_CHAN_REG_SDLNK); +} + static void d40_desc_load(struct d40_chan *d40c, struct d40_desc *d40d) { int curr_lcla = -EINVAL, next_lcla; if (chan_is_physical(d40c)) { - d40_phy_lli_write(d40c->base->virtbase, - d40c->phy_chan->num, - d40d->lli_phy.dst, - d40d->lli_phy.src); + d40_phy_lli_load(d40c, d40d); d40d->lli_current = d40d->lli_len; } else { |