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| author | Hans Rosenfeld <hans.rosenfeld@amd.com> | 2010-10-29 17:14:31 +0200 |
|---|---|---|
| committer | Borislav Petkov <borislav.petkov@amd.com> | 2010-11-18 15:53:05 +0100 |
| commit | 9653a5c76c8677b05b45b3b999d3b39988d2a064 (patch) | |
| tree | 9224748c69296fc6ac50beae72f20e6e2ae16aca /drivers/edac | |
| parent | eec1d4fa00c6552ae2fdf71d59f1eded7c88dd89 (diff) | |
| download | kernel_samsung_tuna-9653a5c76c8677b05b45b3b999d3b39988d2a064.zip kernel_samsung_tuna-9653a5c76c8677b05b45b3b999d3b39988d2a064.tar.gz kernel_samsung_tuna-9653a5c76c8677b05b45b3b999d3b39988d2a064.tar.bz2 | |
x86, amd-nb: Cleanup AMD northbridge caching code
Support more than just the "Misc Control" part of the northbridges.
Support more flags by turning "gart_supported" into a single bit flag
that is stored in a flags member. Clean up related code by using a set
of functions (amd_nb_num(), amd_nb_has_feature() and node_to_amd_nb())
instead of accessing the NB data structures directly. Reorder the
initialization code and put the GART flush words caching in a separate
function.
Signed-off-by: Hans Rosenfeld <hans.rosenfeld@amd.com>
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Diffstat (limited to 'drivers/edac')
| -rw-r--r-- | drivers/edac/amd64_edac.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 8b144cc..774f950 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -2917,7 +2917,7 @@ static int __init amd64_edac_init(void) opstate_init(); - if (cache_amd_northbridges() < 0) + if (amd_cache_northbridges() < 0) goto err_ret; msrs = msrs_alloc(); @@ -2934,7 +2934,7 @@ static int __init amd64_edac_init(void) * to finish initialization of the MC instances. */ err = -ENODEV; - for (nb = 0; nb < amd_northbridges.num; nb++) { + for (nb = 0; nb < amd_nb_num(); nb++) { if (!pvt_lookup[nb]) continue; |